SHORT Double Precision MFLOP/s

EVENTSET
FIXC0 INSTR_RETIRED_ANY
FIXC1 CPU_CLK_UNHALTED_CORE
FIXC2 CPU_CLK_UNHALTED_REF
PMC0  FP_COMP_OPS_EXE_SSE_FP_PACKED_DOUBLE
PMC1  FP_COMP_OPS_EXE_SSE_FP_SCALAR_DOUBLE
PMC2  SIMD_FP_256_PACKED_DOUBLE

METRICS
Runtime (RDTSC) [s] time
Runtime unhalted [s] FIXC1*inverseClock
Clock [MHz]  1.E-06*(FIXC1/FIXC2)/inverseClock
CPI  FIXC1/FIXC0
DP [MFLOP/s]  1.0E-06*(PMC0*2.0+PMC1+PMC2*4.0)/time
AVX DP [MFLOP/s] 1.0E-06*(PMC2*4.0)/time
Packed [MUOPS/s]   1.0E-06*(PMC0+PMC2)/time
Scalar [MUOPS/s] 1.0E-06*PMC1/time
Vectorization ratio [%] 100*(PMC0+PMC2)/(PMC0+PMC1+PMC2)

LONG
Formulas:
DP [MFLOP/s] = 1.0E-06*(FP_COMP_OPS_EXE_SSE_FP_PACKED*2+FP_COMP_OPS_EXE_SSE_FP_SCALAR+SIMD_FP_256_PACKED_DOUBLE*4)/runtime
AVX DP [MFLOP/s] = 1.0E-06*(SIMD_FP_256_PACKED_DOUBLE*4)/runtime
Packed [MUOPS/s] = 1.0E-06*(FP_COMP_OPS_EXE_SSE_FP_PACKED_DOUBLE+SIMD_FP_256_PACKED_DOUBLE)/runtime
Scalar [MUOPS/s] = 1.0E-06*FP_COMP_OPS_EXE_SSE_FP_SCALAR_DOUBLE/runtime
Vectorization ratio [%] = 100*(FP_COMP_OPS_EXE_SSE_FP_PACKED_DOUBLE+SIMD_FP_256_PACKED_DOUBLE)/(FP_COMP_OPS_EXE_SSE_FP_SCALAR_DOUBLE+FP_COMP_OPS_EXE_SSE_FP_PACKED_DOUBLE+SIMD_FP_256_PACKED_DOUBLE)
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SSE scalar and packed double precision FLOP rates. Please note that the current
FLOP measurements on IvyBridge are potentially wrong.
So you cannot trust these counters at the moment!

