# =======================================================================================
#
#      Filename:  perfmon_broadwelld_events.txt
#
#      Description:  Event list for Intel Broadwell D
#
#      Version:   5.4.1
#      Released:  09.12.2024
#
#      Author:   Thomas Gruber (tr), thomas.roehl@googlemail.com
#      Project:  likwid
#
#      Copyright (C) 2024 RRZE, University Erlangen-Nuremberg
#
#      This program is free software: you can redistribute it and/or modify it under
#      the terms of the GNU General Public License as published by the Free Software
#      Foundation, either version 3 of the License, or (at your option) any later
#      version.
#
#      This program is distributed in the hope that it will be useful, but WITHOUT ANY
#      WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A
#      PARTICULAR PURPOSE.  See the GNU General Public License for more details.
#
#      You should have received a copy of the GNU General Public License along with
#      this program.  If not, see <http://www.gnu.org/licenses/>.
#
# =======================================================================================

EVENT_TEMP_CORE          0x00   TMP0
UMASK_TEMP_CORE          0x00

EVENT_PWR_PKG_ENERGY          0x02   PWR0
UMASK_PWR_PKG_ENERGY          0x00

EVENT_PWR_PP0_ENERGY          0x01   PWR1
UMASK_PWR_PP0_ENERGY          0x00

EVENT_PWR_PP1_ENERGY          0x04   PWR2
UMASK_PWR_PP1_ENERGY          0x00

EVENT_PWR_DRAM_ENERGY          0x03   PWR3
UMASK_PWR_DRAM_ENERGY          0x00

EVENT_VOLTAGE_CORE          0x00   VTG0
UMASK_VOLTAGE_CORE          0x00

EVENT_INSTR_RETIRED              0x00   FIXC0
UMASK_INSTR_RETIRED_ANY          0x00

EVENT_CPU_CLK_UNHALTED           0x00   FIXC1
UMASK_CPU_CLK_UNHALTED_CORE      0x00

EVENT_CPU_CLK_UNHALTED           0x00   FIXC2
UMASK_CPU_CLK_UNHALTED_REF       0x00

EVENT_LD_BLOCKS                 0x03  PMC
UMASK_LD_BLOCKS_STORE_FORWARD   0x02
UMASK_LD_BLOCKS_NO_SR           0x08

EVENT_MISALIGN_MEM_REF            0x05  PMC
UMASK_MISALIGN_MEM_REF_LOADS      0x01
UMASK_MISALIGN_MEM_REF_STORES     0x02
UMASK_MISALIGN_MEM_REF_ANY        0x03

EVENT_LD_BLOCKS_PARTIAL                 0x07  PMC
UMASK_LD_BLOCKS_PARTIAL_ADDRESS_ALIAS   0x01

EVENT_DTLB_LOAD_MISSES                       0x08  PMC
UMASK_DTLB_LOAD_MISSES_CAUSES_A_WALK         0x01
UMASK_DTLB_LOAD_MISSES_STLB_HIT              0x60
UMASK_DTLB_LOAD_MISSES_WALK_COMPLETED        0x0E
UMASK_DTLB_LOAD_MISSES_STLB_HIT_4K           0x20
UMASK_DTLB_LOAD_MISSES_WALK_COMPLETED_4K     0x02
UMASK_DTLB_LOAD_MISSES_WALK_DURATION         0x10

EVENT_INT_MISC                      0x0D  PMC
DEFAULT_OPTIONS_INT_MISC_RECOVERY_CYCLES EVENT_OPTION_THRESHOLD=0x01
UMASK_INT_MISC_RECOVERY_CYCLES      0x03
DEFAULT_OPTIONS_INT_MISC_RECOVERY_COUNT EVENT_OPTION_EDGE=1,EVENT_OPTION_THRESHOLD=0x01
UMASK_INT_MISC_RECOVERY_COUNT       0x03
DEFAULT_OPTIONS_INT_MISC_RECOVERY_CYCLES_ANY EVENT_OPTION_THRESHOLD=0x01,EVENT_OPTION_ANYTHREAD=1
UMASK_INT_MISC_RECOVERY_CYCLES_ANY      0x03
DEFAULT_OPTIONS_INT_MISC_RECOVERY_COUNT_ANY EVENT_OPTION_EDGE=1,EVENT_OPTION_THRESHOLD=0x01,EVENT_OPTION_ANYTHREAD=1
UMASK_INT_MISC_RECOVERY_COUNT_ANY       0x03
DEFAULT_OPTIONS_INT_MISC_RAT_STALL_CYCLES EVENT_OPTION_THRESHOLD=0x01
UMASK_INT_MISC_RAT_STALL_CYCLES     0x08
DEFAULT_OPTIONS_INT_MISC_RAT_STALL_COUNT EVENT_OPTION_EDGE=1,EVENT_OPTION_THRESHOLD=0x01
UMASK_INT_MISC_RAT_STALL_COUNT      0x08

EVENT_UOPS_ISSUED                0x0E  PMC
UMASK_UOPS_ISSUED_ANY            0x01
UMASK_UOPS_ISSUED_FLAGS_MERGE    0x10
UMASK_UOPS_ISSUED_SLOW_LEA       0x20
UMASK_UOPS_ISSUED_SINGLE_MUL     0x40
DEFAULT_OPTIONS_UOPS_ISSUED_USED_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_ISSUED_USED_CYCLES   0x01
DEFAULT_OPTIONS_UOPS_ISSUED_STALL_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1
UMASK_UOPS_ISSUED_STALL_CYCLES   0x01
DEFAULT_OPTIONS_UOPS_ISSUED_TOTAL_CYCLES EVENT_OPTION_THRESHOLD=0xA,EVENT_OPTION_INVERT=1
UMASK_UOPS_ISSUED_TOTAL_CYCLES   0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CORE_USED_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_ISSUED_CORE_USED_CYCLES   0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CORE_STALL_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1,EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_ISSUED_CORE_STALL_CYCLES   0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CORE_TOTAL_CYCLES EVENT_OPTION_THRESHOLD=0xA,EVENT_OPTION_INVERT=1,EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_ISSUED_CORE_TOTAL_CYCLES   0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CYCLES_GE_1_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_ISSUED_CYCLES_GE_1_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CYCLES_GE_2_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x2
UMASK_UOPS_ISSUED_CYCLES_GE_2_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CYCLES_GE_3_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x3
UMASK_UOPS_ISSUED_CYCLES_GE_3_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CYCLES_GE_4_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x4
UMASK_UOPS_ISSUED_CYCLES_GE_4_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CYCLES_GE_5_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x5
UMASK_UOPS_ISSUED_CYCLES_GE_5_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CYCLES_GE_6_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x6
UMASK_UOPS_ISSUED_CYCLES_GE_6_UOPS_EXEC 0x01

EVENT_ARITH_FPU_DIV              0x14  PMC
UMASK_ARITH_FPU_DIV_ACTIVE       0x01
DEFAULT_OPTIONS_ARITH_FPU_DIV_COUNT EVENT_OPTION_EDGE=0x1,EVENT_OPTION_THRESHOLD=0x1
UMASK_ARITH_FPU_DIV_COUNT        0x01

EVENT_L2_RQSTS                     0x24   PMC
UMASK_L2_RQSTS_DEMAND_DATA_RD_MISS 0x21
UMASK_L2_RQSTS_DEMAND_DATA_RD_HIT  0x41
UMASK_L2_RQSTS_RFO_MISS            0x22
UMASK_L2_RQSTS_RFO_HIT             0x42
UMASK_L2_RQSTS_CODE_RD_MISS        0x24
UMASK_L2_RQSTS_CODE_RD_HIT         0x44
UMASK_L2_RQSTS_L2_PF_HIT           0x50
UMASK_L2_RQSTS_L2_PF_MISS          0x30
UMASK_L2_RQSTS_ALL_DEMAND_DATA_RD  0xE1
UMASK_L2_RQSTS_ALL_DEMAND_MISS     0x27
UMASK_L2_RQSTS_ALL_RFO             0xE2
UMASK_L2_RQSTS_ALL_CODE_RD         0xE4
UMASK_L2_RQSTS_ALL_DEMAND_REFERENCES 0xE7
UMASK_L2_RQSTS_ALL_PF              0xF8
UMASK_L2_RQSTS_MISS                0x3F
UMASK_L2_RQSTS_REFERENCES          0xFF

EVENT_L2_DEMAND_RQST_WB_HIT        0x27   PMC
UMASK_L2_DEMAND_RQST_WB_HIT        0x50

EVENT_LONGEST_LAT_CACHE            0x2E   PMC
UMASK_LONGEST_LAT_CACHE_REFERENCE  0x4F
UMASK_LONGEST_LAT_CACHE_MISS       0x41

EVENT_CPU_CLOCK_UNHALTED           0x3C   PMC
UMASK_CPU_CLOCK_UNHALTED_THREAD_P  0x00
UMASK_CPU_CLOCK_UNHALTED_REF_XCLK  0x01
UMASK_CPU_CLOCK_UNHALTED_ONE_THREAD_ACTIVE  0x02

EVENT_L1D_PEND_MISS                  0x48   PMC2
UMASK_L1D_PEND_MISS_PENDING          0x01
DEFAULT_OPTIONS_L1D_PEND_MISS_PENDING_CYCLES   EVENT_OPTION_THRESHOLD=0x01
UMASK_L1D_PEND_MISS_PENDING_CYCLES   0x01
DEFAULT_OPTIONS_L1D_PEND_MISS_OCCURRENCES EVENT_OPTION_EDGE=1,EVENT_OPTION_THRESHOLD=0x01
UMASK_L1D_PEND_MISS_OCCURRENCES      0x01

EVENT_DTLB_STORE_MISSES                    0x49   PMC
UMASK_DTLB_STORE_MISSES_CAUSES_A_WALK         0x01
UMASK_DTLB_STORE_MISSES_STLB_HIT              0x60
UMASK_DTLB_STORE_MISSES_WALK_COMPLETED        0x0E
UMASK_DTLB_STORE_MISSES_STLB_HIT_4K           0x20
UMASK_DTLB_STORE_MISSES_WALK_COMPLETED_4K     0x02
UMASK_DTLB_STORE_MISSES_WALK_DURATION         0x10

EVENT_LOAD_HIT_PRE               0x4C    PMC
UMASK_LOAD_HIT_PRE_HW_PF         0x02

EVENT_EPT_WALK_CYCLES            0x4F PMC
UMASK_EPT_WALK_CYCLES            0x10

EVENT_L1D                        0x51   PMC
UMASK_L1D_REPLACEMENT            0x01
# Undocumented event. Tested to count as accurate as L2_TRANS_L1D_WB
UMASK_L1D_M_EVICT                0x04

EVENT_TX_MEM                                        0x54 PMC
UMASK_TX_MEM_ABORT_CONFLICT                         0x01
UMASK_TX_MEM_ABORT_CAPACITY_WRITE                   0x02
UMASK_TX_MEM_ABORT_HLE_STORE_TO_ELIDED_LOCK         0x04
UMASK_TX_MEM_ABORT_HLE_ELISION_BUFFER_NOT_EMPTY     0x08
UMASK_TX_MEM_ABORT_HLE_ELISION_BUFFER_MISMATCH      0x10
UMASK_TX_MEM_ABORT_HLE_ELISION_BUFFER_UNSUPPORTED_ALIGNMENT 0x20
UMASK_TX_MEM_HLE_ELISION_BUFFER_FULL                0x40

EVENT_MOVE_ELIMINATION                        0x58   PMC
UMASK_MOVE_ELIMINATION_INT_NOT_ELIMINATED     0x04
UMASK_MOVE_ELIMINATION_SIMD_NOT_ELIMINATED    0x08
UMASK_MOVE_ELIMINATION_INT_ELIMINATED         0x01
UMASK_MOVE_ELIMINATION_SIMD_ELIMINATED        0x02

EVENT_CPL_CYCLES                   0x5C    PMC
UMASK_CPL_CYCLES_RING0             0x01
UMASK_CPL_CYCLES_RING123           0x02
DEFAULT_OPTIONS_CPL_CYCLES_RING0_TRANS   EVENT_OPTION_THRESHOLD=0x01,EVENT_OPTION_EDGE=1
UMASK_CPL_CYCLES_RING0_TRANS       0x01

EVENT_TX_EXEC                       0x5D PMC
UMASK_TX_EXEC_MISC1                 0x01
UMASK_TX_EXEC_MISC2                 0x02
UMASK_TX_EXEC_MISC3                 0x04
UMASK_TX_EXEC_MISC4                 0x08
UMASK_TX_EXEC_MISC5                 0x10

EVENT_RS_EVENTS                 0x5E    PMC
UMASK_RS_EVENTS_EMPTY_CYCLES    0x01

EVENT_OFFCORE_REQUESTS_OUTSTANDING                  0x60   PMC
DEFAULT_OPTIONS_OFFCORE_REQUESTS_OUTSTANDING_DEMAND_DATA_RD EVENT_OPTION_THRESHOLD=0x01
UMASK_OFFCORE_REQUESTS_OUTSTANDING_DEMAND_DATA_RD   0x01
UMASK_OFFCORE_REQUESTS_OUTSTANDING_DEMAND_CODE_RD   0x02
UMASK_OFFCORE_REQUESTS_OUTSTANDING_DEMAND_RFO       0x04
DEFAULT_OPTIONS_OFFCORE_REQUESTS_OUTSTANDING_ALL_DATA_RD EVENT_OPTION_THRESHOLD=0x01
UMASK_OFFCORE_REQUESTS_OUTSTANDING_ALL_DATA_RD      0x08

EVENT_LOCK_CYCLES                             0x63   PMC
UMASK_LOCK_CYCLES_SPLIT_LOCK_UC_LOCK_DURATION 0x01
UMASK_LOCK_CYCLES_CACHE_LOCK_DURATION         0x02

EVENT_IDQ                               0x79   PMC
UMASK_IDQ_EMPTY                         0x02
UMASK_IDQ_MITE_UOPS                     0x04
UMASK_IDQ_DSB_UOPS                      0x08
UMASK_IDQ_MS_DSB_UOPS                   0x10
UMASK_IDQ_MS_MITE_UOPS                  0x20
UMASK_IDQ_MS_UOPS                       0x30
UMASK_IDQ_DSB_ALL_UOPS                  0x18
UMASK_IDQ_MITE_ALL_UOPS                 0x24
UMASK_IDQ_ALL_UOPS                      0x3C
DEFAULT_OPTIONS_IDQ_MITE_CYCLES         EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MITE_CYCLES                   0x04
DEFAULT_OPTIONS_IDQ_MITE_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MITE_CYCLES_1_UOPS            0x04
DEFAULT_OPTIONS_IDQ_MITE_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_MITE_CYCLES_2_UOPS            0x04
DEFAULT_OPTIONS_IDQ_MITE_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_MITE_CYCLES_3_UOPS            0x04
DEFAULT_OPTIONS_IDQ_MITE_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_MITE_CYCLES_4_UOPS            0x04
DEFAULT_OPTIONS_IDQ_DSB_CYCLES          EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_DSB_CYCLES                    0x08
DEFAULT_OPTIONS_IDQ_DSB_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_DSB_CYCLES_1_UOPS             0x08
DEFAULT_OPTIONS_IDQ_DSB_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_DSB_CYCLES_2_UOPS             0x08
DEFAULT_OPTIONS_IDQ_DSB_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_DSB_CYCLES_3_UOPS             0x08
DEFAULT_OPTIONS_IDQ_DSB_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_DSB_CYCLES_4_UOPS             0x08
DEFAULT_OPTIONS_IDQ_MS_DSB_CYCLES       EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MS_DSB_CYCLES                 0x10
DEFAULT_OPTIONS_IDQ_MS_DSB_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MS_DSB_CYCLES_1_UOPS          0x10
DEFAULT_OPTIONS_IDQ_MS_DSB_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_MS_DSB_CYCLES_2_UOPS          0x10
DEFAULT_OPTIONS_IDQ_MS_DSB_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_MS_DSB_CYCLES_3_UOPS          0x10
DEFAULT_OPTIONS_IDQ_MS_DSB_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_MS_DSB_CYCLES_4_UOPS          0x10
DEFAULT_OPTIONS_IDQ_MS_DSB_OCCUR        EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_EDGE=1
UMASK_IDQ_MS_DSB_OCCUR                  0x10
DEFAULT_OPTIONS_IDQ_MS_MITE_CYCLES      EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MS_MITE_CYCLES                0x20
DEFAULT_OPTIONS_IDQ_MS_MITE_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MS_MITE_CYCLES_1_UOPS         0x20
DEFAULT_OPTIONS_IDQ_MS_MITE_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_MS_MITE_CYCLES_2_UOPS         0x20
DEFAULT_OPTIONS_IDQ_MS_MITE_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_MS_MITE_CYCLES_3_UOPS         0x20
DEFAULT_OPTIONS_IDQ_MS_MITE_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_MS_MITE_CYCLES_4_UOPS         0x20
DEFAULT_OPTIONS_IDQ_MS_CYCLES           EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MS_CYCLES                     0x30
DEFAULT_OPTIONS_IDQ_MS_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MS_CYCLES_1_UOPS              0x30
DEFAULT_OPTIONS_IDQ_MS_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_MS_CYCLES_2_UOPS              0x30
DEFAULT_OPTIONS_IDQ_MS_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_MS_CYCLES_3_UOPS              0x30
DEFAULT_OPTIONS_IDQ_MS_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_MS_CYCLES_4_UOPS              0x30
DEFAULT_OPTIONS_IDQ_MS_SWITCHES         EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_EDGE=1
UMASK_IDQ_MS_SWITCHES                   0x30
DEFAULT_OPTIONS_IDQ_ALL_DSB_CYCLES_ANY_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_ALL_DSB_CYCLES_ANY_UOPS       0x18
DEFAULT_OPTIONS_IDQ_ALL_DSB_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_ALL_DSB_CYCLES_1_UOPS         0x18
DEFAULT_OPTIONS_IDQ_ALL_DSB_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_ALL_DSB_CYCLES_2_UOPS         0x18
DEFAULT_OPTIONS_IDQ_ALL_DSB_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_ALL_DSB_CYCLES_3_UOPS         0x18
DEFAULT_OPTIONS_IDQ_ALL_DSB_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_ALL_DSB_CYCLES_4_UOPS         0x18
DEFAULT_OPTIONS_IDQ_ALL_MITE_CYCLES_ANY_UOPS  EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_ALL_MITE_CYCLES_ANY_UOPS      0x24
DEFAULT_OPTIONS_IDQ_ALL_MITE_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_ALL_MITE_CYCLES_1_UOPS        0x24
DEFAULT_OPTIONS_IDQ_ALL_MITE_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_ALL_MITE_CYCLES_2_UOPS        0x24
DEFAULT_OPTIONS_IDQ_ALL_MITE_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_ALL_MITE_CYCLES_3_UOPS        0x24
DEFAULT_OPTIONS_IDQ_ALL_MITE_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_ALL_MITE_CYCLES_4_UOPS        0x24
DEFAULT_OPTIONS_IDQ_ALL_CYCLES_ANY_UOPS  EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_ALL_CYCLES_ANY_UOPS      0x3C
DEFAULT_OPTIONS_IDQ_ALL_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_ALL_CYCLES_1_UOPS        0x3C
DEFAULT_OPTIONS_IDQ_ALL_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_ALL_CYCLES_2_UOPS        0x3C
DEFAULT_OPTIONS_IDQ_ALL_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_ALL_CYCLES_3_UOPS        0x3C
DEFAULT_OPTIONS_IDQ_ALL_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_ALL_CYCLES_4_UOPS        0x3C

EVENT_ICACHE                  0x80   PMC
UMASK_ICACHE_HIT              0x01
UMASK_ICACHE_MISSES           0x02
UMASK_ICACHE_ACCESSES         0x03

EVENT_ITLB_MISSES                   0x85      PMC
UMASK_ITLB_MISSES_CAUSES_A_WALK     0x01
UMASK_ITLB_MISSES_STLB_HIT          0x60
UMASK_ITLB_MISSES_WALK_COMPLETED    0x0E
UMASK_ITLB_MISSES_STLB_HIT_4K       0x20
UMASK_ITLB_MISSES_WALK_COMPLETED_4K 0x02
UMASK_ITLB_MISSES_WALK_DURATION     0x10


EVENT_ILD_STALL                 0x87      PMC
UMASK_ILD_STALL_LCP             0x01

EVENT_BR_INST_EXEC                                      0x88   PMC
UMASK_BR_INST_EXEC_COND_TAKEN                           0x81
UMASK_BR_INST_EXEC_COND_NON_TAKEN                       0x41
UMASK_BR_INST_EXEC_DIRECT_JMP_TAKEN                     0x82
UMASK_BR_INST_EXEC_INDIRECT_JMP_NON_CALL_RET_TAKEN      0x84
UMASK_BR_INST_EXEC_RETURN_NEAR_TAKEN                    0x88
UMASK_BR_INST_EXEC_DIRECT_NEAR_CALL_TAKEN               0x90
UMASK_BR_INST_EXEC_INDIRECT_NEAR_CALL_TAKEN             0xA0
UMASK_BR_INST_EXEC_ALL_CONDITIONAL                      0xC1
UMASK_BR_INST_EXEC_ALL_DIRECT_JMP                       0xC2
UMASK_BR_INST_EXEC_ALL_DIRECT_NEAR_CALL                 0xD0
UMASK_BR_INST_EXEC_ALL_INDIRECT_JUMP_NON_CALL_RET       0xC4
UMASK_BR_INST_EXEC_ALL_INDIRECT_NEAR_RETURN             0xC8
UMASK_BR_INST_EXEC_ALL_BRANCHES                         0xFF

EVENT_BR_MISP_EXEC                                      0x89   PMC
UMASK_BR_MISP_EXEC_COND_TAKEN                           0x81
UMASK_BR_MISP_EXEC_COND_NON_TAKEN                       0x41
UMASK_BR_MISP_EXEC_INDIRECT_JMP_NON_CALL_RET_TAKEN      0x84
UMASK_BR_MISP_EXEC_RETURN_NEAR_TAKEN                    0x88
UMASK_BR_MISP_EXEC_DIRECT_NEAR_CALL_TAKEN               0x90
UMASK_BR_MISP_EXEC_INDIRECT_NEAR_CALL_TAKEN             0xA0
UMASK_BR_MISP_EXEC_ALL_CONDITIONAL                      0xC1
UMASK_BR_MISP_EXEC_ALL_INDIRECT_JUMP_NON_CALL_RET       0xC4
UMASK_BR_MISP_EXEC_ALL_BRANCHES                         0xFF

EVENT_IDQ_UOPS_NOT_DELIVERED                    0x9C   PMC
UMASK_IDQ_UOPS_NOT_DELIVERED_CORE               0x01
DEFAULT_OPTIONS_IDQ_UOPS_NOT_DELIVERED_CYCLES_0_UOPS_DELIV_CORE EVENT_OPTION_THRESHOLD=0x04
UMASK_IDQ_UOPS_NOT_DELIVERED_CYCLES_0_UOPS_DELIV_CORE 0x01
DEFAULT_OPTIONS_IDQ_UOPS_NOT_DELIVERED_CYCLES_LE_1_UOP_DELIV_CORE EVENT_OPTION_THRESHOLD=0x03
UMASK_IDQ_UOPS_NOT_DELIVERED_CYCLES_LE_1_UOP_DELIV_CORE 0x01
DEFAULT_OPTIONS_IDQ_UOPS_NOT_DELIVERED_CYCLES_LE_2_UOP_DELIV_CORE EVENT_OPTION_THRESHOLD=0x02
UMASK_IDQ_UOPS_NOT_DELIVERED_CYCLES_LE_2_UOP_DELIV_CORE 0x01
DEFAULT_OPTIONS_IDQ_UOPS_NOT_DELIVERED_CYCLES_LE_3_UOP_DELIV_CORE EVENT_OPTION_THRESHOLD=0x01
UMASK_IDQ_UOPS_NOT_DELIVERED_CYCLES_LE_3_UOP_DELIV_CORE 0x01
DEFAULT_OPTIONS_IDQ_UOPS_NOT_DELIVERED_CYCLES_FE_WAS_OK EVENT_OPTION_THRESHOLD=0x01,EVENT_OPTION_INVERT=1
UMASK_IDQ_UOPS_NOT_DELIVERED_CYCLES_FE_WAS_OK 0x01

EVENT_UOP_DISPATCHES_CANCELLED_SIMD_PRF   0xA0 PMC
UMASK_UOP_DISPATCHES_CANCELLED_SIMD_PRF   0x03

EVENT_UOPS_EXECUTED_PORT                  0xA1   PMC
UMASK_UOPS_EXECUTED_PORT_PORT_0           0x01
UMASK_UOPS_EXECUTED_PORT_PORT_1           0x02
UMASK_UOPS_EXECUTED_PORT_PORT_2           0x04
UMASK_UOPS_EXECUTED_PORT_PORT_3           0x08
UMASK_UOPS_EXECUTED_PORT_PORT_4           0x10
UMASK_UOPS_EXECUTED_PORT_PORT_5           0x20
UMASK_UOPS_EXECUTED_PORT_PORT_6           0x40
UMASK_UOPS_EXECUTED_PORT_PORT_7           0x80
DEFAULT_OPTIONS_UOPS_EXECUTED_PORT_PORT_0_CORE    EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_EXECUTED_PORT_PORT_0_CORE      0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_PORT_PORT_1_CORE    EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_EXECUTED_PORT_PORT_1_CORE      0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_PORT_PORT_2_CORE    EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_EXECUTED_PORT_PORT_2_CORE      0x04
DEFAULT_OPTIONS_UOPS_EXECUTED_PORT_PORT_3_CORE    EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_EXECUTED_PORT_PORT_3_CORE      0x08
DEFAULT_OPTIONS_UOPS_EXECUTED_PORT_PORT_4_CORE    EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_EXECUTED_PORT_PORT_4_CORE      0x10
DEFAULT_OPTIONS_UOPS_EXECUTED_PORT_PORT_5_CORE    EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_EXECUTED_PORT_PORT_5_CORE      0x20
DEFAULT_OPTIONS_UOPS_EXECUTED_PORT_PORT_6_CORE    EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_EXECUTED_PORT_PORT_6_CORE      0x40
DEFAULT_OPTIONS_UOPS_EXECUTED_PORT_PORT_7_CORE    EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_EXECUTED_PORT_PORT_7_CORE      0x80

EVENT_RESOURCE_STALLS                 0xA2   PMC
UMASK_RESOURCE_STALLS_ANY             0x01
UMASK_RESOURCE_STALLS_RS              0x04
UMASK_RESOURCE_STALLS_SB              0x08
UMASK_RESOURCE_STALLS_ROB             0x10

EVENT_CYCLE_ACTIVITY_CYCLES_L1D_MISS    0xA3 PMC2
DEFAULT_OPTIONS_CYCLE_ACTIVITY_CYCLES_L1D_MISS    EVENT_OPTION_THRESHOLD=0x08
UMASK_CYCLE_ACTIVITY_CYCLES_L1D_MISS    0x08

EVENT_CYCLE_ACTIVITY_CYCLES_L1D_PENDING    0xA3 PMC2
DEFAULT_OPTIONS_CYCLE_ACTIVITY_CYCLES_L1D_PENDING    EVENT_OPTION_THRESHOLD=0x08
UMASK_CYCLE_ACTIVITY_CYCLES_L1D_PENDING    0x08

EVENT_CYCLE_ACTIVITY_CYCLES             0xA3 PMC
DEFAULT_OPTIONS_CYCLE_ACTIVITY_CYCLES_L2_MISS    EVENT_OPTION_THRESHOLD=0x01
UMASK_CYCLE_ACTIVITY_CYCLES_L2_MISS     0x01
DEFAULT_OPTIONS_CYCLE_ACTIVITY_CYCLES_L2_PENDING EVENT_OPTION_THRESHOLD=0x01
UMASK_CYCLE_ACTIVITY_CYCLES_L2_PENDING  0x01
DEFAULT_OPTIONS_CYCLE_ACTIVITY_CYCLES_MEM_ANY    EVENT_OPTION_THRESHOLD=0x02
UMASK_CYCLE_ACTIVITY_CYCLES_MEM_ANY     0x02
DEFAULT_OPTIONS_CYCLE_ACTIVITY_CYCLES_LDM_PENDING EVENT_OPTION_THRESHOLD=0x02
UMASK_CYCLE_ACTIVITY_CYCLES_LDM_PENDING 0x02
DEFAULT_OPTIONS_CYCLE_ACTIVITY_CYCLES_NO_EXECUTE EVENT_OPTION_THRESHOLD=0x04
UMASK_CYCLE_ACTIVITY_CYCLES_NO_EXECUTE  0x04

EVENT_CYCLE_ACTIVITY_STALLS_L1D_MISS    0xA3 PMC2
DEFAULT_OPTIONS_CYCLE_ACTIVITY_STALLS_L1D_MISS    EVENT_OPTION_THRESHOLD=0x0C
UMASK_CYCLE_ACTIVITY_STALLS_L1D_MISS    0x0C

EVENT_CYCLE_ACTIVITY_STALLS_L1D_PENDING    0xA3 PMC2
DEFAULT_OPTIONS_CYCLE_ACTIVITY_STALLS_L1D_PENDING    EVENT_OPTION_THRESHOLD=0x0C
UMASK_CYCLE_ACTIVITY_STALLS_L1D_PENDING    0x0C

EVENT_CYCLE_ACTIVITY_STALLS             0xA3 PMC
DEFAULT_OPTIONS_CYCLE_ACTIVITY_STALLS_L2_MISS    EVENT_OPTION_THRESHOLD=0x05
UMASK_CYCLE_ACTIVITY_STALLS_L2_MISS     0x05
DEFAULT_OPTIONS_CYCLE_ACTIVITY_STALLS_L2_PENDING EVENT_OPTION_THRESHOLD=0x05
UMASK_CYCLE_ACTIVITY_STALLS_L2_PENDING  0x05
DEFAULT_OPTIONS_CYCLE_ACTIVITY_STALLS_MEM_ANY    EVENT_OPTION_THRESHOLD=0x06
UMASK_CYCLE_ACTIVITY_STALLS_MEM_ANY     0x06
DEFAULT_OPTIONS_CYCLE_ACTIVITY_STALLS_LDM_PENDING EVENT_OPTION_THRESHOLD=0x06
UMASK_CYCLE_ACTIVITY_STALLS_LDM_PENDING 0x06
DEFAULT_OPTIONS_CYCLE_ACTIVITY_STALLS_TOTAL EVENT_OPTION_THRESHOLD=0x04
UMASK_CYCLE_ACTIVITY_STALLS_TOTAL       0x04

EVENT_LSD_UOPS                 0xA8   PMC
UMASK_LSD_UOPS                 0x01
DEFAULT_OPTIONS_LSD_UOPS_CYCLES_1 EVENT_OPTION_THRESHOLD=0x1
UMASK_LSD_UOPS_CYCLES_1         0x01
DEFAULT_OPTIONS_LSD_UOPS_CYCLES_2 EVENT_OPTION_THRESHOLD=0x2
UMASK_LSD_UOPS_CYCLES_2         0x01
DEFAULT_OPTIONS_LSD_UOPS_CYCLES_3 EVENT_OPTION_THRESHOLD=0x3
UMASK_LSD_UOPS_CYCLES_3         0x01
DEFAULT_OPTIONS_LSD_UOPS_CYCLES_4 EVENT_OPTION_THRESHOLD=0x4
UMASK_LSD_UOPS_CYCLES_4         0x01
DEFAULT_OPTIONS_LSD_UOPS_CYCLES_ACTIVE EVENT_OPTION_THRESHOLD=0x01
UMASK_LSD_UOPS_CYCLES_ACTIVE        0x01
DEFAULT_OPTIONS_LSD_UOPS_CYCLES_INACTIVE EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1
UMASK_LSD_UOPS_CYCLES_INACTIVE         0x01

EVENT_DSB2MITE_SWITCHES_PENALTY_CYCLES 0xAB PMC
UMASK_DSB2MITE_SWITCHES_PENALTY_CYCLES 0x02

EVENT_ITLB                       0xAE   PMC
UMASK_ITLB_ITLB_FLUSH            0x01

EVENT_OFFCORE_REQUESTS     0xB0   PMC
UMASK_OFFCORE_REQUESTS_DEMAND_DATA_RD   0x01
UMASK_OFFCORE_REQUESTS_DEMAND_CODE_RD   0x02
UMASK_OFFCORE_REQUESTS_DEMAND_RFO       0x04
UMASK_OFFCORE_REQUESTS_ALL_DATA_RD      0x08

EVENT_UOPS_EXECUTED                       0xB1   PMC
UMASK_UOPS_EXECUTED_THREAD                0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_USED_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_EXECUTED_USED_CYCLES           0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_STALL_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1
UMASK_UOPS_EXECUTED_STALL_CYCLES          0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_TOTAL_CYCLES EVENT_OPTION_THRESHOLD=0xA,EVENT_OPTION_INVERT=1
UMASK_UOPS_EXECUTED_TOTAL_CYCLES          0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_1_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_EXECUTED_CYCLES_GE_1_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_2_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x2
UMASK_UOPS_EXECUTED_CYCLES_GE_2_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_3_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x3
UMASK_UOPS_EXECUTED_CYCLES_GE_3_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_4_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x4
UMASK_UOPS_EXECUTED_CYCLES_GE_4_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_5_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x5
UMASK_UOPS_EXECUTED_CYCLES_GE_5_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_6_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x6
UMASK_UOPS_EXECUTED_CYCLES_GE_6_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_7_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x7
UMASK_UOPS_EXECUTED_CYCLES_GE_7_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_8_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x8
UMASK_UOPS_EXECUTED_CYCLES_GE_8_UOPS_EXEC 0x01
UMASK_UOPS_EXECUTED_CORE                  0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_USED_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_EXECUTED_CORE_USED_CYCLES           0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_STALL_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1
UMASK_UOPS_EXECUTED_CORE_STALL_CYCLES          0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_TOTAL_CYCLES EVENT_OPTION_THRESHOLD=0xA,EVENT_OPTION_INVERT=1
UMASK_UOPS_EXECUTED_CORE_TOTAL_CYCLES          0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_1_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_1_UOPS_EXEC 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_2_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x2
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_2_UOPS_EXEC 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_3_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x3
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_3_UOPS_EXEC 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_4_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x4
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_4_UOPS_EXEC 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_5_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x5
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_5_UOPS_EXEC 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_6_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x6
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_6_UOPS_EXEC 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_7_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x7
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_7_UOPS_EXEC 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_8_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x8
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_8_UOPS_EXEC 0x02

EVENT_OFFCORE_REQUESTS_BUFFER_SQ_FULL 0xB2 PMC
UMASK_OFFCORE_REQUESTS_BUFFER_SQ_FULL 0x01

EVENT_PAGE_WALKER_LOADS             0xBC  PMC
UMASK_PAGE_WALKER_LOADS_DTLB_L1     0x11
UMASK_PAGE_WALKER_LOADS_ITLB_L1     0x21
UMASK_PAGE_WALKER_LOADS_DTLB_L2     0x12
UMASK_PAGE_WALKER_LOADS_ITLB_L2     0x22
UMASK_PAGE_WALKER_LOADS_DTLB_L3     0x14
UMASK_PAGE_WALKER_LOADS_ITLB_L3     0x24
UMASK_PAGE_WALKER_LOADS_DTLB_MEMORY 0x18

EVENT_INST_RETIRED                  0xC0  PMC
UMASK_INST_RETIRED_ANY_P            0x00
UMASK_INST_RETIRED_X87              0x02

EVENT_INST_RETIRED_PREC             0xC0  PMC1
UMASK_INST_RETIRED_PREC_DIST        0x01

EVENT_OTHER_ASSISTS                  0xC1  PMC
UMASK_OTHER_ASSISTS_AVX_TO_SSE       0x08
UMASK_OTHER_ASSISTS_SSE_TO_AVX       0x10
UMASK_OTHER_ASSISTS_ANY_WB_ASSIST    0x40

EVENT_UOPS_RETIRED                       0xC2  PMC
UMASK_UOPS_RETIRED_ALL                   0x01
UMASK_UOPS_RETIRED_RETIRE_SLOTS          0x02
DEFAULT_OPTIONS_UOPS_RETIRED_USED_CYCLES       EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_RETIRED_USED_CYCLES           0x01
DEFAULT_OPTIONS_UOPS_RETIRED_STALL_CYCLES      EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1
UMASK_UOPS_RETIRED_STALL_CYCLES          0x01
DEFAULT_OPTIONS_UOPS_RETIRED_TOTAL_CYCLES      EVENT_OPTION_THRESHOLD=0xA,EVENT_OPTION_INVERT=1
UMASK_UOPS_RETIRED_TOTAL_CYCLES          0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CORE_ALL          EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_RETIRED_CORE_ALL              0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CORE_RETIRE_SLOTS EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_RETIRED_CORE_RETIRE_SLOTS     0x02
DEFAULT_OPTIONS_UOPS_RETIRED_CORE_USED_CYCLES  EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_RETIRED_CORE_USED_CYCLES      0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CORE_STALL_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1,EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_RETIRED_CORE_STALL_CYCLES     0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CORE_TOTAL_CYCLES EVENT_OPTION_THRESHOLD=0xA,EVENT_OPTION_INVERT=1,EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_RETIRED_CORE_TOTAL_CYCLES     0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_1_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_RETIRED_CYCLES_GE_1_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_2_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x2
UMASK_UOPS_RETIRED_CYCLES_GE_2_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_3_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x3
UMASK_UOPS_RETIRED_CYCLES_GE_3_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_4_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x4
UMASK_UOPS_RETIRED_CYCLES_GE_4_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_5_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x5
UMASK_UOPS_RETIRED_CYCLES_GE_5_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_6_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x6
UMASK_UOPS_RETIRED_CYCLES_GE_6_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_7_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x7
UMASK_UOPS_RETIRED_CYCLES_GE_7_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_8_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x8
UMASK_UOPS_RETIRED_CYCLES_GE_8_UOPS_EXEC 0x01

EVENT_MACHINE_CLEARS                    0xC3  PMC
DEFAULT_OPTIONS_MACHINE_CLEARS_COUNT    EVENT_OPTION_THRESHOLD=0x01,EVENT_OPTION_EDGE=1
UMASK_MACHINE_CLEARS_COUNT              0x01
UMASK_MACHINE_CLEARS_CYCLES             0x01
UMASK_MACHINE_CLEARS_MEMORY_ORDERING    0x02
UMASK_MACHINE_CLEARS_SMC                0x04
UMASK_MACHINE_CLEARS_MASKMOV            0x20

EVENT_BR_INST_RETIRED               0xC4  PMC
UMASK_BR_INST_RETIRED_ALL_BRANCHES  0x00
UMASK_BR_INST_RETIRED_CONDITIONAL   0x01
UMASK_BR_INST_RETIRED_NEAR_CALL     0x02
UMASK_BR_INST_RETIRED_NEAR_RETURN   0x08
UMASK_BR_INST_RETIRED_NOT_TAKEN     0x10
UMASK_BR_INST_RETIRED_NEAR_TAKEN    0x20
UMASK_BR_INST_RETIRED_FAR_BRANCH    0x40

EVENT_BR_MISP_RETIRED                0xC5  PMC
UMASK_BR_MISP_RETIRED_ALL_BRANCHES   0x00
UMASK_BR_MISP_RETIRED_CONDITIONAL    0x01
UMASK_BR_MISP_RETIRED_NEAR_TAKEN     0x20

EVENT_FP_ARITH_INST_RETIRED               0xC7 PMC
UMASK_FP_ARITH_INST_RETIRED_SCALAR_DOUBLE      0x01
UMASK_FP_ARITH_INST_RETIRED_SCALAR_SINGLE      0x02
UMASK_FP_ARITH_INST_RETIRED_128B_PACKED_DOUBLE 0x04
UMASK_FP_ARITH_INST_RETIRED_128B_PACKED_SINGLE 0x08
UMASK_FP_ARITH_INST_RETIRED_256B_PACKED_DOUBLE 0x10
UMASK_FP_ARITH_INST_RETIRED_256B_PACKED_SINGLE 0x20
UMASK_FP_ARITH_INST_RETIRED_SCALAR             0x03
UMASK_FP_ARITH_INST_RETIRED_PACKED             0x3C
UMASK_FP_ARITH_INST_RETIRED_DOUBLE             0x15
UMASK_FP_ARITH_INST_RETIRED_SINGLE             0x2A

EVENT_HLE_RETIRED                    0xC8 PMC
UMASK_HLE_RETIRED_START              0x01
UMASK_HLE_RETIRED_COMMIT             0x02
UMASK_HLE_RETIRED_ABORTED            0x04
UMASK_HLE_RETIRED_ABORTED_MISC1      0x08
UMASK_HLE_RETIRED_ABORTED_MISC2      0x10
UMASK_HLE_RETIRED_ABORTED_MISC3      0x20
UMASK_HLE_RETIRED_ABORTED_MISC4      0x40
UMASK_HLE_RETIRED_ABORTED_MISC5      0x80

EVENT_RTM_RETIRED                    0xC9 PMC
UMASK_RTM_RETIRED_START              0x01
UMASK_RTM_RETIRED_COMMIT             0x02
UMASK_RTM_RETIRED_ABORTED            0x04
UMASK_RTM_RETIRED_ABORTED_MISC1      0x08
UMASK_RTM_RETIRED_ABORTED_MISC2      0x10
UMASK_RTM_RETIRED_ABORTED_MISC3      0x20
UMASK_RTM_RETIRED_ABORTED_MISC4      0x40
UMASK_RTM_RETIRED_ABORTED_MISC5      0x80

EVENT_FP_ASSIST                      0xCA  PMC
UMASK_FP_ASSIST_X87_OUTPUT           0x02
UMASK_FP_ASSIST_X87_INPUT            0x04
UMASK_FP_ASSIST_SIMD_OUTPUT          0x08
UMASK_FP_ASSIST_SIMD_INPUT           0x10
UMASK_FP_ASSIST_ANY                  0x1E

EVENT_ROB_MISC_EVENT_LBR_INSERTS     0xCC  PMC
UMASK_ROB_MISC_EVENT_LBR_INSERTS     0x20

EVENT_MEM_UOPS_RETIRED                  0xD0    PMC
UMASK_MEM_UOPS_RETIRED_LOADS_ALL        0x81
UMASK_MEM_UOPS_RETIRED_STORES_ALL       0x82
UMASK_MEM_UOPS_RETIRED_LOADS_LOCK       0x21
UMASK_MEM_UOPS_RETIRED_LOADS_STLB_MISS  0x11
UMASK_MEM_UOPS_RETIRED_STORES_STLB_MISS 0x12
UMASK_MEM_UOPS_RETIRED_LOADS_SPLIT      0x41
UMASK_MEM_UOPS_RETIRED_STORES_SPLIT     0x42

EVENT_MEM_LOAD_UOPS_RETIRED              0xD1   PMC
UMASK_MEM_LOAD_UOPS_RETIRED_L1_HIT       0x01
UMASK_MEM_LOAD_UOPS_RETIRED_L1_MISS      0x08
UMASK_MEM_LOAD_UOPS_RETIRED_L1_ALL       0x09
UMASK_MEM_LOAD_UOPS_RETIRED_L2_HIT       0x02
UMASK_MEM_LOAD_UOPS_RETIRED_L2_MISS      0x10
UMASK_MEM_LOAD_UOPS_RETIRED_L2_ALL       0x12
UMASK_MEM_LOAD_UOPS_RETIRED_L3_HIT       0x04
UMASK_MEM_LOAD_UOPS_RETIRED_L3_MISS      0x20
UMASK_MEM_LOAD_UOPS_RETIRED_L3_ALL       0x24
UMASK_MEM_LOAD_UOPS_RETIRED_HIT_LFB      0x40

EVENT_MEM_LOAD_UOPS_L3_HIT_RETIRED           0xD2   PMC
UMASK_MEM_LOAD_UOPS_L3_HIT_RETIRED_XSNP_MISS 0x01
UMASK_MEM_LOAD_UOPS_L3_HIT_RETIRED_XSNP_HIT  0x02
UMASK_MEM_LOAD_UOPS_L3_HIT_RETIRED_XSNP_HITM 0x04
UMASK_MEM_LOAD_UOPS_L3_HIT_RETIRED_XSNP_NONE 0x08

EVENT_MEM_LOAD_UOPS_L3_MISS_RETIRED            0xD3   PMC
UMASK_MEM_LOAD_UOPS_L3_MISS_RETIRED_LOCAL_DRAM 0x01

EVENT_BACLEARS                0xE6 PMC
UMASK_BACLEARS_ANY            0x1F

EVENT_L2_TRANS                0xF0  PMC
UMASK_L2_TRANS_DEMAND_DATA_RD 0x01
UMASK_L2_TRANS_RFO            0x02
UMASK_L2_TRANS_CODE_RD        0x04
UMASK_L2_TRANS_ALL_PF         0x08
UMASK_L2_TRANS_L1D_WB         0x10
UMASK_L2_TRANS_L2_FILL        0x20
UMASK_L2_TRANS_L2_WB          0x40
UMASK_L2_TRANS_ALL_REQUESTS   0x80

EVENT_L2_LINES_IN             0xF1   PMC
UMASK_L2_LINES_IN_I           0x01
UMASK_L2_LINES_IN_S           0x02
UMASK_L2_LINES_IN_E           0x04
UMASK_L2_LINES_IN_ALL         0x07

EVENT_L2_LINES_OUT                  0xF2   PMC
UMASK_L2_LINES_OUT_DEMAND_CLEAN     0x05
UMASK_L2_LINES_OUT_DEMAND_DIRTY     0x06

EVENT_OFFCORE_RESPONSE_0                            0xB7 PMC
OPTIONS_OFFCORE_RESPONSE_0_OPTIONS                  EVENT_OPTION_MATCH0_MASK|EVENT_OPTION_MATCH1_MASK
UMASK_OFFCORE_RESPONSE_0_OPTIONS                    0x01 0xFF 0xFF
UMASK_OFFCORE_RESPONSE_0_DMND_DATA_RD_ANY           0x01 0x00 0x10
UMASK_OFFCORE_RESPONSE_0_DMND_RFO_ANY               0x01 0x01 0x10
UMASK_OFFCORE_RESPONSE_0_DMND_CODE_RD_ANY           0x01 0x02 0x10
UMASK_OFFCORE_RESPONSE_0_WB_ANY                     0x01 0x03 0x10
UMASK_OFFCORE_RESPONSE_0_PF_L2_DATA_RD_ANY          0x01 0x04 0x10
UMASK_OFFCORE_RESPONSE_0_PF_L2_RFO_ANY              0x01 0x05 0x10
UMASK_OFFCORE_RESPONSE_0_PF_L2_CODE_RD_ANY          0x01 0x06 0x10
UMASK_OFFCORE_RESPONSE_0_PF_L3_DATA_RD_ANY          0x01 0x07 0x10
UMASK_OFFCORE_RESPONSE_0_PF_L3_RFO_ANY              0x01 0x08 0x10
UMASK_OFFCORE_RESPONSE_0_PF_L3_CODE_RD_ANY          0x01 0x09 0x10
UMASK_OFFCORE_RESPONSE_0_SPLIT_LOCK_UC_LOCK_ANY     0x01 0x0A 0x10
UMASK_OFFCORE_RESPONSE_0_STREAMING_STORES_ANY       0x01 0x0B 0x10
UMASK_OFFCORE_RESPONSE_0_OTHER_ANY                  0x01 0x0F 0x10

EVENT_OFFCORE_RESPONSE_1                            0xBB PMC
OPTIONS_OFFCORE_RESPONSE_1_OPTIONS                  EVENT_OPTION_MATCH0_MASK|EVENT_OPTION_MATCH1_MASK
UMASK_OFFCORE_RESPONSE_1_OPTIONS                    0x01 0xFF 0xFF
UMASK_OFFCORE_RESPONSE_1_DMND_DATA_RD_ANY           0x01 0x00 0x10
UMASK_OFFCORE_RESPONSE_1_DMND_RFO_ANY               0x01 0x01 0x10
UMASK_OFFCORE_RESPONSE_1_DMND_CODE_RD_ANY           0x01 0x02 0x10
UMASK_OFFCORE_RESPONSE_1_WB_ANY                     0x01 0x03 0x10
UMASK_OFFCORE_RESPONSE_1_PF_L2_DATA_RD_ANY          0x01 0x04 0x10
UMASK_OFFCORE_RESPONSE_1_PF_L2_RFO_ANY              0x01 0x05 0x10
UMASK_OFFCORE_RESPONSE_1_PF_L2_CODE_RD_ANY          0x01 0x06 0x10
UMASK_OFFCORE_RESPONSE_1_PF_L3_DATA_RD_ANY          0x01 0x07 0x10
UMASK_OFFCORE_RESPONSE_1_PF_L3_RFO_ANY              0x01 0x08 0x10
UMASK_OFFCORE_RESPONSE_1_PF_L3_CODE_RD_ANY          0x01 0x09 0x10
UMASK_OFFCORE_RESPONSE_1_SPLIT_LOCK_UC_LOCK_ANY     0x01 0x0A 0x10
UMASK_OFFCORE_RESPONSE_1_STREAMING_STORES_ANY       0x01 0x0B 0x10
UMASK_OFFCORE_RESPONSE_1_OTHER_ANY                  0x01 0x0F 0x10

EVENT_EVENT_MSG                     0x42 UBOX
UMASK_EVENT_MSG_DOORBELL_RCVD       0x08

EVENT_PHOLD_CYCLES                  0x45 UBOX
UMASK_PHOLD_CYCLES_ASSERT_TO_ACK    0x01

EVENT_RACU_REQUESTS                 0x46 UBOX
UMASK_RACU_REQUESTS                 0x00

EVENT_UNCORE_CLOCK                  0x00 UBOXFIX
UMASK_UNCORE_CLOCK                  0x00

EVENT_CBOX_CLOCKTICKS               0x00 CBOX
UMASK_CBOX_CLOCKTICKS               0x00

EVENT_TXR_INSERTS                   0x02 CBOX
UMASK_TXR_INSERTS_AD_CACHE          0x01
UMASK_TXR_INSERTS_AK_CACHE          0x02
UMASK_TXR_INSERTS_BL_CACHE          0x04
UMASK_TXR_INSERTS_IV_CACHE          0x08
UMASK_TXR_INSERTS_AD_CORE           0x10
UMASK_TXR_INSERTS_AK_CORE           0x20
UMASK_TXR_INSERTS_BL_CORE           0x40

EVENT_TXR_ADS_USED                  0x04 CBOX
UMASK_TXR_ADS_USED_AD               0x01
UMASK_TXR_ADS_USED_AK               0x02
UMASK_TXR_ADS_USED_BL               0x04

EVENT_RING_BOUNCES                  0x05 CBOX
UMASK_RING_BOUNCES_AD               0x01
UMASK_RING_BOUNCES_AK               0x02
UMASK_RING_BOUNCES_BL               0x04
UMASK_RING_BOUNCES_IV               0x10

EVENT_RING_SRC_THRTL                0x07 CBOX
UMASK_RING_SRC_THRTL                0x00

EVENT_FAST_ASSERTED                 0x09 CBOX0C0|CBOX0C1|CBOX1C0|CBOX1C1|CBOX2C0|CBOX2C1|CBOX3C0|CBOX3C1|CBOX4C0|CBOX4C1|CBOX5C0|CBOX5C1|CBOX6C0|CBOX6C1|CBOX7C0|CBOX7C1|CBOX8C0|CBOX8C1|CBOX9C0|CBOX9C1|CBOX10C0|CBOX10C1|CBOX11C0|CBOX11C1|CBOX12C0|CBOX12C1|CBOX13C0|CBOX13C1|CBOX14C0|CBOX14C1|CBOX15C0|CBOX15C1
UMASK_FAST_ASSERTED                 0x00

EVENT_BOUNCE_CONTROL                0x0A CBOX
UMASK_BOUNCE_CONTROL                0x00

EVENT_RING_AD_USED                  0x1B CBOX
UMASK_RING_AD_USED_UP_EVEN          0x01
UMASK_RING_AD_USED_UP_ODD           0x02
UMASK_RING_AD_USED_UP               0x03
UMASK_RING_AD_USED_DOWN_EVEN        0x04
UMASK_RING_AD_USED_DOWN_ODD         0x08
UMASK_RING_AD_USED_DOWN             0x0C
UMASK_RING_AD_USED_ANY              0x0F

EVENT_RING_AK_USED                  0x1C CBOX
UMASK_RING_AK_USED_UP_EVEN          0x01
UMASK_RING_AK_USED_UP_ODD           0x02
UMASK_RING_AK_USED_UP               0x03
UMASK_RING_AK_USED_DOWN_EVEN        0x04
UMASK_RING_AK_USED_DOWN_ODD         0x08
UMASK_RING_AK_USED_DOWN             0x0C
UMASK_RING_AK_USED_ANY              0x0F

EVENT_RING_BL_USED                  0x1D CBOX
UMASK_RING_BL_USED_UP_EVEN          0x01
UMASK_RING_BL_USED_UP_ODD           0x02
UMASK_RING_BL_USED_UP               0x03
UMASK_RING_BL_USED_DOWN_EVEN        0x04
UMASK_RING_BL_USED_DOWN_ODD         0x08
UMASK_RING_BL_USED_DOWN             0x0C
UMASK_RING_BL_USED_ANY              0x0F

EVENT_RING_IV_USED                  0x1E CBOX
UMASK_RING_IV_USED_UP               0x03
UMASK_RING_IV_USED_DN               0x0C
UMASK_RING_IV_USED_ANY              0x0F

EVENT_COUNTER0_OCCUPANCY            0x1F CBOX
UMASK_COUNTER0_OCCUPANCY            0x00

EVENT_RXR_OCCUPANCY                 0x11 CBOX0C0|CBOX1C0|CBOX2C0|CBOX3C0|CBOX4C0|CBOX5C0|CBOX6C0|CBOX7C0|CBOX8C0|CBOX9C0|CBOX10C0|CBOX11C0|CBOX12C0|CBOX13C0|CBOX14C0|CBOX15C0
UMASK_RXR_OCCUPANCY_IRQ             0x01
UMASK_RXR_OCCUPANCY_IRQ_REJ         0x02
UMASK_RXR_OCCUPANCY_IPQ             0x04
UMASK_RXR_OCCUPANCY_PRQ_REJ         0x20

EVENT_RXR_EXT_STARVED               0x12 CBOX
UMASK_RXR_EXT_STARVED_IRQ           0x01
UMASK_RXR_EXT_STARVED_IPQ           0x02
UMASK_RXR_EXT_STARVED_PRQ           0x04
UMASK_RXR_EXT_STARVED_ISMQ_BIDS     0x08

EVENT_RXR_INSERTS                   0x13 CBOX
UMASK_RXR_INSERTS_IRQ               0x01
UMASK_RXR_INSERTS_IRQ_REJ           0x02
UMASK_RXR_INSERTS_IPQ               0x04
UMASK_RXR_INSERTS_PRQ               0x10
UMASK_RXR_INSERTS_PRQ_REJ           0x20

EVENT_RXR_IPQ_RETRY                 0x31 CBOX
UMASK_RXR_IPQ_RETRY_ANY             0x01
UMASK_RXR_IPQ_RETRY_FULL            0x02
UMASK_RXR_IPQ_RETRY_ADDR_CONFLICT   0x04
UMASK_RXR_IPQ_RETRY_QPI_CREDITS     0x10

EVENT_RXR_IPQ_RETRY2                0x28 CBOX
UMASK_RXR_IPQ_RETRY2_AD_SBO         0x01
OPTIONS_RXR_IPQ_RETRY2_TARGET       EVENT_OPTION_NID_MASK
UMASK_RXR_IPQ_RETRY2_TARGET         0x40

EVENT_RXR_IRQ_RETRY                 0x32 CBOX
UMASK_RXR_IRQ_RETRY_ANY             0x01
UMASK_RXR_IRQ_RETRY_FULL            0x02
UMASK_RXR_IRQ_RETRY_ADDR_CONFLICT   0x04
UMASK_RXR_IRQ_RETRY_RTID            0x08
UMASK_RXR_IRQ_RETRY_QPI_CREDITS     0x10
UMASK_RXR_IRQ_RETRY_IIO_CREDITS     0x20
OPTIONS_RXR_IRQ_RETRY_NID           EVENT_OPTION_NID_MASK
UMASK_RXR_IRQ_RETRY_NID             0x40

EVENT_RXR_IRQ_RETRY2                0x29 CBOX
UMASK_RXR_IRQ_RETRY2_AD_SBO         0x01
UMASK_RXR_IRQ_RETRY2_BL_SBO         0x02
OPTIONS_RXR_IRQ_RETRY2_TARGET       EVENT_OPTION_NID_MASK
UMASK_RXR_IRQ_RETRY2_TARGET         0x40

EVENT_RXR_ISMQ_RETRY                0x33 CBOX
UMASK_RXR_ISMQ_RETRY_ANY            0x01
UMASK_RXR_ISMQ_RETRY_FULL           0x02
UMASK_RXR_ISMQ_RETRY_RTID           0x08
UMASK_RXR_ISMQ_RETRY_QPI_CREDITS    0x10
UMASK_RXR_ISMQ_RETRY_IIO_CREDITS    0x20
OPTIONS_RXR_ISMQ_RETRY_NID          EVENT_OPTION_NID_MASK
UMASK_RXR_ISMQ_RETRY_NID            0x40
OPTIONS_RXR_ISMQ_RETRY_WB_CREDITS   EVENT_OPTION_NID_MASK
UMASK_RXR_ISMQ_RETRY_WB_CREDITS     0x80

EVENT_RXR_ISMQ_RETRY2                0x2A CBOX
UMASK_RXR_ISMQ_RETRY2_AD_SBO         0x01
UMASK_RXR_ISMQ_RETRY2_BL_SBO         0x02
OPTIONS_RXR_ISMQ_RETRY2_TARGET       EVENT_OPTION_NID_MASK
UMASK_RXR_ISMQ_RETRY2_TARGET         0x40

EVENT_LLC_LOOKUP                    0x34 CBOX
OPTIONS_LLC_LOOKUP_DATA_READ        EVENT_OPTION_STATE_MASK
UMASK_LLC_LOOKUP_DATA_READ          0x03
OPTIONS_LLC_LOOKUP_WRITE            EVENT_OPTION_STATE_MASK
UMASK_LLC_LOOKUP_WRITE              0x05
OPTIONS_LLC_LOOKUP_REMOTE_SNOOP     EVENT_OPTION_STATE_MASK
UMASK_LLC_LOOKUP_REMOTE_SNOOP       0x09
OPTIONS_LLC_LOOKUP_ANY              EVENT_OPTION_STATE_MASK
UMASK_LLC_LOOKUP_ANY                0x11
OPTIONS_LLC_LOOKUP_READ             EVENT_OPTION_STATE_MASK
UMASK_LLC_LOOKUP_READ               0x21
OPTIONS_LLC_LOOKUP_NID              EVENT_OPTION_STATE_MASK|EVENT_OPTION_NID_MASK
UMASK_LLC_LOOKUP_NID                0x41

EVENT_LLC_VICTIMS                   0x37 CBOX
UMASK_LLC_VICTIMS_M                 0x01
UMASK_LLC_VICTIMS_E                 0x02
UMASK_LLC_VICTIMS_S                 0x04
UMASK_LLC_VICTIMS_F                 0x08
UMASK_LLC_VICTIMS_MISS              0x10
OPTIONS_LLC_VICTIMS_NID             EVENT_OPTION_STATE_MASK|EVENT_OPTION_NID_MASK
UMASK_LLC_VICTIMS_NID               0x40

EVENT_TOR_INSERTS                   0x35 CBOX
OPTIONS_TOR_INSERTS_OPCODE          EVENT_OPTION_OPCODE_MASK
UMASK_TOR_INSERTS_OPCODE            0x01
OPTIONS_TOR_INSERTS_MISS_OPCODE     EVENT_OPTION_OPCODE_MASK
UMASK_TOR_INSERTS_MISS_OPCODE       0x03
UMASK_TOR_INSERTS_EVICTION          0x04
UMASK_TOR_INSERTS_ALL               0x08
UMASK_TOR_INSERTS_WB                0x10
OPTIONS_TOR_INSERTS_LOCAL_OPCODE    EVENT_OPTION_OPCODE_MASK
UMASK_TOR_INSERTS_LOCAL_OPCODE      0x21
OPTIONS_TOR_INSERTS_MISS_LOCAL_OPCODE EVENT_OPTION_OPCODE_MASK
UMASK_TOR_INSERTS_MISS_LOCAL_OPCODE 0x23
UMASK_TOR_INSERTS_LOCAL             0x28
UMASK_TOR_INSERTS_MISS_LOCAL        0x2A
OPTIONS_TOR_INSERTS_NID_OPCODE      EVENT_OPTION_NID_MASK|EVENT_OPTION_OPCODE_MASK
UMASK_TOR_INSERTS_NID_OPCODE        0x41
OPTIONS_TOR_INSERTS_NID_MISS_OPCODE EVENT_OPTION_NID_MASK|EVENT_OPTION_OPCODE_MASK
UMASK_TOR_INSERTS_NID_MISS_OPCODE   0x43
OPTIONS_TOR_INSERTS_NID_EVICION     EVENT_OPTION_NID_MASK
UMASK_TOR_INSERTS_NID_EVICION       0x44
DEFAULT_OPTIONS_TOR_INSERTS_NID_ALL EVENT_OPTION_STATE=0x01
OPTIONS_TOR_INSERTS_NID_ALL         EVENT_OPTION_NID_MASK
UMASK_TOR_INSERTS_NID_ALL           0x48
OPTIONS_TOR_INSERTS_NID_MISS_ALL    EVENT_OPTION_NID_MASK
UMASK_TOR_INSERTS_NID_MISS_ALL      0x4A
OPTIONS_TOR_INSERTS_NID_WB          EVENT_OPTION_NID_MASK
UMASK_TOR_INSERTS_NID_WB            0x50
OPTIONS_TOR_INSERTS_REMOTE_OPCODE   EVENT_OPTION_OPCODE_MASK
UMASK_TOR_INSERTS_REMOTE_OPCODE     0x81
OPTIONS_TOR_INSERTS_MISS_REMOTE_OPCODE EVENT_OPTION_OPCODE_MASK
UMASK_TOR_INSERTS_MISS_REMOTE_OPCODE 0x83
UMASK_TOR_INSERTS_REMOTE            0x88
UMASK_TOR_INSERTS_MISS_REMOTE       0x8A

EVENT_TOR_OCCUPANCY                 0x36 CBOX0C0|CBOX1C0|CBOX2C0|CBOX3C0|CBOX4C0|CBOX5C0|CBOX6C0|CBOX7C0|CBOX8C0|CBOX9C0|CBOX10C0|CBOX11C0|CBOX12C0|CBOX13C0|CBOX14C0|CBOX15C0
OPTIONS_TOR_OCCUPANCY_OPCODE        EVENT_OPTION_OPCODE_MASK
UMASK_TOR_OCCUPANCY_OPCODE          0x01
OPTIONS_TOR_OCCUPANCY_MISS_OPCODE   EVENT_OPTION_OPCODE_MASK
UMASK_TOR_OCCUPANCY_MISS_OPCODE     0x03
UMASK_TOR_OCCUPANCY_EVICTION        0x04
UMASK_TOR_OCCUPANCY_ALL             0x08
UMASK_TOR_OCCUPANCY_MISS_ALL        0x0A
UMASK_TOR_OCCUPANCY_WB              0x10
UMASK_TOR_OCCUPANCY_LOCAL_OPCODE    0x21
UMASK_TOR_OCCUPANCY_MISS_LOCAL_OPCODE 0x23
UMASK_TOR_OCCUPANCY_LOCAL           0x28
UMASK_TOR_OCCUPANCY_MISS_LOCAL      0x2A
OPTIONS_TOR_OCCUPANCY_NID_OPCODE    EVENT_OPTION_NID_MASK|EVENT_OPTION_OPCODE_MASK
UMASK_TOR_OCCUPANCY_NID_OPCODE      0x41
OPTIONS_TOR_OCCUPANCY_NID_MISS_OPCODE EVENT_OPTION_NID_MASK|EVENT_OPTION_OPCODE_MASK
UMASK_TOR_OCCUPANCY_NID_MISS_OPCODE 0x43
OPTIONS_TOR_OCCUPANCY_NID_EVICTION  EVENT_OPTION_NID_MASK
UMASK_TOR_OCCUPANCY_NID_EVICTION    0x44
OPTIONS_TOR_OCCUPANCY_NID_ALL       EVENT_OPTION_NID_MASK
UMASK_TOR_OCCUPANCY_NID_ALL         0x48
OPTIONS_TOR_OCCUPANCY_NID_MISS_ALL  EVENT_OPTION_NID_MASK
UMASK_TOR_OCCUPANCY_NID_MISS_ALL    0x4A
OPTIONS_TOR_OCCUPANCY_NID_WB        EVENT_OPTION_NID_MASK
UMASK_TOR_OCCUPANCY_NID_WB          0x50
OPTIONS_TOR_OCCUPANCY_REMOTE_OPCODE   EVENT_OPTION_OPCODE_MASK
UMASK_TOR_OCCUPANCY_REMOTE_OPCODE   0x81
OPTIONS_TOR_OCCUPANCY_MISS_REMOTE_OPCODE   EVENT_OPTION_OPCODE_MASK
UMASK_TOR_OCCUPANCY_MISS_REMOTE_OPCODE 0x83
UMASK_TOR_OCCUPANCY_REMOTE          0x88
UMASK_TOR_OCCUPANCY_MISS_REMOTE     0x8A

EVENT_MISC                          0x39 CBOX
UMASK_MISC_RSPI_WAS_FSE             0x01
UMASK_MISC_WC_ALIASING              0x02
UMASK_MISC_STARTED                  0x04
UMASK_MISC_RFO_HIT_S                0x08
UMASK_MISC_CVZERO_PREFETCH_VICTIM   0x10
UMASK_MISC_CVZERO_PREFETCH_MISS     0x20

EVENT_WBOX_CLOCKTICKS               0x00 WBOX
UMASK_WBOX_CLOCKTICKS               0x00

EVENT_CORE0_TRANSITION_CYCLES       0x60 WBOX
UMASK_CORE0_TRANSITION_CYCLES       0x00

EVENT_CORE1_TRANSITION_CYCLES       0x61 WBOX
UMASK_CORE1_TRANSITION_CYCLES       0x00

EVENT_CORE2_TRANSITION_CYCLES       0x62 WBOX
UMASK_CORE2_TRANSITION_CYCLES       0x00

EVENT_CORE3_TRANSITION_CYCLES       0x63 WBOX
UMASK_CORE3_TRANSITION_CYCLES       0x00

EVENT_CORE4_TRANSITION_CYCLES       0x64 WBOX
UMASK_CORE4_TRANSITION_CYCLES       0x00

EVENT_CORE5_TRANSITION_CYCLES       0x65 WBOX
UMASK_CORE5_TRANSITION_CYCLES       0x00

EVENT_CORE6_TRANSITION_CYCLES       0x66 WBOX
UMASK_CORE6_TRANSITION_CYCLES       0x00

EVENT_CORE7_TRANSITION_CYCLES       0x67 WBOX
UMASK_CORE7_TRANSITION_CYCLES       0x00

EVENT_CORE8_TRANSITION_CYCLES       0x68 WBOX
UMASK_CORE8_TRANSITION_CYCLES       0x00

EVENT_CORE9_TRANSITION_CYCLES       0x69 WBOX
UMASK_CORE9_TRANSITION_CYCLES       0x00

EVENT_CORE10_TRANSITION_CYCLES       0x6A WBOX
UMASK_CORE10_TRANSITION_CYCLES       0x00

EVENT_CORE11_TRANSITION_CYCLES       0x6B WBOX
UMASK_CORE11_TRANSITION_CYCLES       0x00

EVENT_CORE12_TRANSITION_CYCLES       0x6C WBOX
UMASK_CORE12_TRANSITION_CYCLES       0x00

EVENT_CORE13_TRANSITION_CYCLES       0x6D WBOX
UMASK_CORE13_TRANSITION_CYCLES       0x00

EVENT_CORE14_TRANSITION_CYCLES       0x6E WBOX
UMASK_CORE14_TRANSITION_CYCLES       0x00

EVENT_CORE15_TRANSITION_CYCLES       0x6F WBOX
UMASK_CORE15_TRANSITION_CYCLES       0x00

EVENT_CORE16_TRANSITION_CYCLES       0x70 WBOX
UMASK_CORE16_TRANSITION_CYCLES       0x00

EVENT_CORE17_TRANSITION_CYCLES       0x71 WBOX
UMASK_CORE17_TRANSITION_CYCLES       0x00

EVENT_FIVR_PS_PS0_CYCLES             0x75 WBOX
UMASK_FIVR_PS_PS0_CYCLES             0x00

EVENT_FIVR_PS_PS1_CYCLES             0x75 WBOX
UMASK_FIVR_PS_PS1_CYCLES             0x00

EVENT_FIVR_PS_PS2_CYCLES             0x75 WBOX
UMASK_FIVR_PS_PS2_CYCLES             0x00

EVENT_FIVR_PS_PS3_CYCLES             0x75 WBOX
UMASK_FIVR_PS_PS3_CYCLES             0x00

EVENT_DEMOTIONS_CORE0                0x30 WBOX
UMASK_DEMOTIONS_CORE0                0x00

EVENT_DEMOTIONS_CORE1                0x31 WBOX
UMASK_DEMOTIONS_CORE1                0x00

EVENT_DEMOTIONS_CORE2                0x32 WBOX
UMASK_DEMOTIONS_CORE2                0x00

EVENT_DEMOTIONS_CORE3                0x33 WBOX
UMASK_DEMOTIONS_CORE3                0x00

EVENT_DEMOTIONS_CORE4                0x34 WBOX
UMASK_DEMOTIONS_CORE4                0x00

EVENT_DEMOTIONS_CORE5                0x35 WBOX
UMASK_DEMOTIONS_CORE5                0x00

EVENT_DEMOTIONS_CORE6                0x36 WBOX
UMASK_DEMOTIONS_CORE6                0x00

EVENT_DEMOTIONS_CORE7                0x37 WBOX
UMASK_DEMOTIONS_CORE7                0x00

EVENT_DEMOTIONS_CORE8                0x38 WBOX
UMASK_DEMOTIONS_CORE8                0x00

EVENT_DEMOTIONS_CORE9                0x39 WBOX
UMASK_DEMOTIONS_CORE9                0x00

EVENT_DEMOTIONS_CORE10                0x3A WBOX
UMASK_DEMOTIONS_CORE10                0x00

EVENT_DEMOTIONS_CORE11                0x3B WBOX
UMASK_DEMOTIONS_CORE11                0x00

EVENT_DEMOTIONS_CORE12                0x3C WBOX
UMASK_DEMOTIONS_CORE12                0x00

EVENT_DEMOTIONS_CORE13                0x3D WBOX
UMASK_DEMOTIONS_CORE13                0x00

EVENT_DEMOTIONS_CORE14                0x3E WBOX
UMASK_DEMOTIONS_CORE14                0x00

EVENT_DEMOTIONS_CORE15                0x3F WBOX
UMASK_DEMOTIONS_CORE15                0x00

EVENT_DEMOTIONS_CORE16                0x40 WBOX
UMASK_DEMOTIONS_CORE16                0x00

EVENT_DEMOTIONS_CORE17                0x41 WBOX
UMASK_DEMOTIONS_CORE17                0x00

EVENT_FREQ_BAND0_CYCLES                 0x0B WBOX
OPTIONS_FREQ_BAND0_CYCLES               EVENT_OPTION_OCCUPANCY_FILTER_MASK
UMASK_FREQ_BAND0_CYCLES                 0x00

EVENT_FREQ_BAND1_CYCLES                 0x0C WBOX
OPTIONS_FREQ_BAND1_CYCLES               EVENT_OPTION_OCCUPANCY_FILTER_MASK
UMASK_FREQ_BAND1_CYCLES                 0x00

EVENT_FREQ_BAND2_CYCLES                 0x0D WBOX
OPTIONS_FREQ_BAND2_CYCLES               EVENT_OPTION_OCCUPANCY_FILTER_MASK
UMASK_FREQ_BAND2_CYCLES                 0x00

EVENT_FREQ_BAND3_CYCLES                 0x0E WBOX
OPTIONS_FREQ_BAND3_CYCLES               EVENT_OPTION_OCCUPANCY_FILTER_MASK
UMASK_FREQ_BAND3_CYCLES                 0x00

EVENT_FREQ_MAX_LIMIT_THERMAL_CYCLES     0x04 WBOX
UMASK_FREQ_MAX_LIMIT_THERMAL_CYCLES     0x00

EVENT_FREQ_MAX_OS_CYCLES                0x06 WBOX
UMASK_FREQ_MAX_OS_CYCLES                0x00

EVENT_FREQ_MAX_POWER_CYCLES             0x05 WBOX
UMASK_FREQ_MAX_POWER_CYCLES             0x00

EVENT_FREQ_MIN_IO_P_CYCLES              0x73 WBOX
UMASK_FREQ_MIN_IO_P_CYCLES              0x00

EVENT_FREQ_TRANS_CYCLES                 0x74 WBOX
UMASK_FREQ_TRANS_CYCLES                 0x00

EVENT_MEMORY_PHASE_SHEDDING_CYCLES      0x2F WBOX
UMASK_MEMORY_PHASE_SHEDDING_CYCLES      0x00

EVENT_POWER_STATE_OCCUPANCY             0x80 WBOX
UMASK_POWER_STATE_OCCUPANCY_CORES_C0    0x40
UMASK_POWER_STATE_OCCUPANCY_CORES_C3    0x80
UMASK_POWER_STATE_OCCUPANCY_CORES_C6    0xC0

EVENT_PROCHOT_EXTERNAL_CYCLES           0x0A WBOX
UMASK_PROCHOT_EXTERNAL_CYCLES           0x00

EVENT_PROCHOT_INTERNAL_CYCLES           0x09 WBOX
UMASK_PROCHOT_INTERNAL_CYCLES           0x00

EVENT_TOTAL_TRANSITION_CYCLES           0x72 WBOX
UMASK_TOTAL_TRANSITION_CYCLES           0x00

EVENT_VR_HOT_CYCLES                     0x42 WBOX
UMASK_VR_HOT_CYCLES                     0x00

EVENT_UFS_BANDWIDTH_MAX_RANGE           0x7E WBOX
UMASK_UFS_BANDWIDTH_MAX_RANGE           0x00

EVENT_UFS_TRANSITIONS_DOWN              0x7C WBOX
UMASK_UFS_TRANSITIONS_DOWN              0x00

EVENT_UFS_TRANSITIONS_IO_P_LIMIT        0x7D WBOX
UMASK_UFS_TRANSITIONS_IO_P_LIMIT        0x00

EVENT_UFS_TRANSITIONS_NO_CHANGE         0x79 WBOX
UMASK_UFS_TRANSITIONS_NO_CHANGE         0x00

EVENT_UFS_TRANSITIONS_UP_RING           0x7A WBOX
UMASK_UFS_TRANSITIONS_UP_RING           0x00

EVENT_UFS_TRANSITIONS_UP_STALL          0x7B WBOX
UMASK_UFS_TRANSITIONS_UP_STALL          0x00

EVENT_CORES_IN_C3                       0x00 WBOX0FIX
UMASK_CORES_IN_C3                       0x00

EVENT_CORES_IN_C6                       0x00 WBOX1FIX
UMASK_CORES_IN_C6                       0x00

EVENT_BBOX_CLOCKTICKS                   0x00 BBOX
UMASK_BBOX_CLOCKTICKS                   0x00

EVENT_ADDR_OPC_MATCH                    0x20 BBOX
OPTIONS_ADDR_OPC_MATCH_ADDR             EVENT_OPTION_MATCH0_MASK|EVENT_OPTION_MATCH1_MASK
UMASK_ADDR_OPC_MATCH_ADDR               0x01
OPTIONS_ADDR_OPC_MATCH_OPC              EVENT_OPTION_OPCODE_MASK
UMASK_ADDR_OPC_MATCH_OPC                0x02
OPTIONS_ADDR_OPC_MATCH_FILT             EVENT_OPTION_OPCODE_MASK|EVENT_OPTION_MATCH0_MASK|EVENT_OPTION_MATCH1_MASK
UMASK_ADDR_OPC_MATCH_FILT               0x03
OPTIONS_ADDR_OPC_MATCH_AD               EVENT_OPTION_OPCODE_MASK
UMASK_ADDR_OPC_MATCH_AD                 0x04
OPTIONS_ADDR_OPC_MATCH_BL               EVENT_OPTION_OPCODE_MASK
UMASK_ADDR_OPC_MATCH_BL                 0x08
OPTIONS_ADDR_OPC_MATCH_AK               EVENT_OPTION_OPCODE_MASK
UMASK_ADDR_OPC_MATCH_AK                 0x10

EVENT_BT_CYCLES_NE                      0x42 BBOX
UMASK_BT_CYCLES_NE                      0x00

EVENT_BT_OCCUPANCY                      0x43 BBOX
UMASK_BT_OCCUPANCY                      0x00

EVENT_BYPASS_IMC                        0x14 BBOX
UMASK_BYPASS_IMC_TAKEN                  0x01
UMASK_BYPASS_IMC_NOT_TAKEN              0x02

EVENT_CONFLICT_CYCLES                   0x0B BBOX0C1|BBOX1C1
UMASK_CONFLICT_CYCLES                   0x00

EVENT_DIRECT2CORE_COUNT                 0x11 BBOX
UMASK_DIRECT2CORE_COUNT                 0x00

EVENT_DIRECT2CORE_CYCLES_DISABLED       0x12 BBOX
UMASK_DIRECT2CORE_CYCLES_DISABLED       0x00

EVENT_DIRECT2CORE_TXN_OVERRIDE          0x13 BBOX
UMASK_DIRECT2CORE_TXN_OVERRIDE          0x00

EVENT_DIRECTORY_LAT_OPT                 0x41 BBOX
UMASK_DIRECTORY_LAT_OPT                 0x00

EVENT_DIRECTORY_LOOKUP                  0x0C BBOX
UMASK_DIRECTORY_LOOKUP_SNP              0x01
UMASK_DIRECTORY_LOOKUP_NO_SNP           0x02

EVENT_DIRECTORY_UPDATE                  0x0D BBOX
UMASK_DIRECTORY_UPDATE_SET              0x01
UMASK_DIRECTORY_UPDATE_CLEAR            0x02
UMASK_DIRECTORY_UPDATE_ANY              0x03

EVENT_HITME_LOOKUP                      0x70 BBOX
UMASK_HITME_LOOKUP_READ_OR_INVITOE         0x01
UMASK_HITME_LOOKUP_WBMTOI                  0x02
UMASK_HITME_LOOKUP_ACKCNFLTWBI             0x04
UMASK_HITME_LOOKUP_WBMTOE_OR_S             0x08
UMASK_HITME_LOOKUP_HOM                     0x0F
UMASK_HITME_LOOKUP_RSPFWDI_REMOTE          0x10
UMASK_HITME_LOOKUP_RSPFWDI_LOCAL           0x20
UMASK_HITME_LOOKUP_INVALS                  0x26
UMASK_HITME_LOOKUP_RSPFWDS                 0x40
UMASK_HITME_LOOKUP_ALLOCS                  0x70
UMASK_HITME_LOOKUP_RSP                     0x80
UMASK_HITME_LOOKUP_ALL                     0xFF

EVENT_HITME_HIT                         0x71 BBOX
UMASK_HITME_HIT_READ_OR_INVITOE         0x01
UMASK_HITME_HIT_WBMTOI                  0x02
UMASK_HITME_HIT_ACKCNFLTWBI             0x04
UMASK_HITME_HIT_WBMTOE_OR_S             0x08
UMASK_HITME_HIT_HOM                     0x0F
UMASK_HITME_HIT_RSPFWDI_REMOTE          0x10
UMASK_HITME_HIT_RSPFWDI_LOCAL           0x20
UMASK_HITME_HIT_INVALS                  0x26
UMASK_HITME_HIT_RSPFWDS                 0x40
UMASK_HITME_HIT_EVICTS                  0x42
UMASK_HITME_HIT_ALLOCS                  0x70
UMASK_HITME_HIT_RSP                     0x80
UMASK_HITME_HIT_ALL                     0xFF

EVENT_HITME_HIT_PV_BITS_SET             0x72 BBOX
UMASK_HITME_HIT_PV_BITS_SET_READ_OR_INVITOE 0x01
UMASK_HITME_HIT_PV_BITS_SET_WBMTOI          0x02
UMASK_HITME_HIT_PV_BITS_SET_ACKCNFLTWBI     0x04
UMASK_HITME_HIT_PV_BITS_SET_WBMTOE_OR_S     0x08
UMASK_HITME_HIT_PV_BITS_SET_HOM             0x0F
UMASK_HITME_HIT_PV_BITS_SET_RSPFWDI_REMOTE  0x10
UMASK_HITME_HIT_PV_BITS_SET_RSPFWDI_LOCAL   0x20
UMASK_HITME_HIT_PV_BITS_SET_RSPFWDS         0x40
UMASK_HITME_HIT_PV_BITS_SET_RSP             0x80
UMASK_HITME_HIT_PV_BITS_SET_ALL             0xFF

EVENT_IGR_NO_CREDIT_CYCLES              0x22 BBOX
UMASK_IGR_NO_CREDIT_CYCLES_AD_QPI0      0x01
UMASK_IGR_NO_CREDIT_CYCLES_AD_QPI1      0x02
UMASK_IGR_NO_CREDIT_CYCLES_BL_QPI0      0x04
UMASK_IGR_NO_CREDIT_CYCLES_BL_QPI1      0x08
UMASK_IGR_NO_CREDIT_CYCLES_AD_QPI2      0x10
UMASK_IGR_NO_CREDIT_CYCLES_BL_QPI2      0x20

EVENT_IMC_READS                         0x17 BBOX
UMASK_IMC_READS_NORMAL                  0x01

EVENT_IMC_RETRY                         0x1E BBOX
UMASK_IMC_RETRY                         0x00

EVENT_IMC_WRITES                        0x1A BBOX
UMASK_IMC_WRITES_FULL                   0x01
UMASK_IMC_WRITES_PARTIAL                0x02
UMASK_IMC_WRITES_FULL_ISOCH             0x04
UMASK_IMC_WRITES_PARTIAL_ISOCH          0x08
UMASK_IMC_WRITES_ALL                    0x0F

EVENT_OSB                               0x53 BBOX
UMASK_OSB_READS_LOCAL                   0x02
UMASK_OSB_INVITOE_LOCAL                 0x04
UMASK_OSB_REMOTE                        0x08
UMASK_OSB_CANCELLED                     0x10
UMASK_OSB_READS_LOCAL_USEFUL            0x20
UMASK_OSB_REMOTE_USEFUL                 0x40

EVENT_OSB_EDR                           0x54 BBOX
UMASK_OSB_EDR_ALL                       0x01
UMASK_OSB_EDR_READS_LOCAL_I             0x02
UMASK_OSB_EDR_READS_REMOTE_I            0x04
UMASK_OSB_EDR_READS_LOCAL_S             0x08
UMASK_OSB_EDR_READS_REMOTE_S            0x10

EVENT_REQUESTS                          0x01 BBOX
UMASK_REQUESTS_READS_LOCAL              0x01
UMASK_REQUESTS_READS_REMOTE             0x02
UMASK_REQUESTS_READS                    0x03
UMASK_REQUESTS_WRITES_LOCAL             0x04
UMASK_REQUESTS_WRITES_REMOTE            0x08
UMASK_REQUESTS_WRITES                   0x0C
UMASK_REQUESTS_INVITOE_LOCAL            0x10
UMASK_REQUESTS_INVITOE_REMOTE           0x20

EVENT_HA_RING_AD_USED                      0x3E BBOX
UMASK_HA_RING_AD_USED_CW_EVEN              0x01
UMASK_HA_RING_AD_USED_CW_ODD               0x02
UMASK_HA_RING_AD_USED_CW                   0x03
UMASK_HA_RING_AD_USED_CCW_EVEN             0x04
UMASK_HA_RING_AD_USED_CCW_ODD              0x08
UMASK_HA_RING_AD_USED_CCW                  0x0C

EVENT_HA_RING_AK_USED                      0x3F BBOX
UMASK_HA_RING_AK_USED_CW_EVEN              0x01
UMASK_HA_RING_AK_USED_CW_ODD               0x02
UMASK_HA_RING_AK_USED_CW                   0x03
UMASK_HA_RING_AK_USED_CCW_EVEN             0x04
UMASK_HA_RING_AK_USED_CCW_ODD              0x08
UMASK_HA_RING_AK_USED_CCW                  0x0C

EVENT_HA_RING_BL_USED                      0x40 BBOX
UMASK_HA_RING_BL_USED_CW_EVEN              0x01
UMASK_HA_RING_BL_USED_CW_ODD               0x02
UMASK_HA_RING_BL_USED_CW                   0x03
UMASK_HA_RING_BL_USED_CCW_EVEN             0x04
UMASK_HA_RING_BL_USED_CCW_ODD              0x08
UMASK_HA_RING_BL_USED_CCW                  0x0C

EVENT_RPQ_CYCLES_NO_REG_CREDITS         0x15 BBOX
UMASK_RPQ_CYCLES_NO_REG_CREDITS_CHN0    0x01
UMASK_RPQ_CYCLES_NO_REG_CREDITS_CHN1    0x02
UMASK_RPQ_CYCLES_NO_REG_CREDITS_CHN2    0x04
UMASK_RPQ_CYCLES_NO_REG_CREDITS_CHN3    0x08

EVENT_RPQ_CYCLES_NO_SPEC_CREDITS         0x16 BBOX
UMASK_RPQ_CYCLES_NO_SPEC_CREDITS_CHN0    0x01
UMASK_RPQ_CYCLES_NO_SPEC_CREDITS_CHN1    0x02
UMASK_RPQ_CYCLES_NO_SPEC_CREDITS_CHN2    0x04
UMASK_RPQ_CYCLES_NO_SPEC_CREDITS_CHN3    0x08

EVENT_WPQ_CYCLES_NO_REG_CREDITS         0x18 BBOX
UMASK_WPQ_CYCLES_NO_REG_CREDITS_CHN0    0x01
UMASK_WPQ_CYCLES_NO_REG_CREDITS_CHN1    0x02
UMASK_WPQ_CYCLES_NO_REG_CREDITS_CHN2    0x04
UMASK_WPQ_CYCLES_NO_REG_CREDITS_CHN3    0x08

EVENT_WPQ_CYCLES_NO_SPEC_CREDITS         0x19 BBOX
UMASK_WPQ_CYCLES_NO_SPEC_CREDITS_CHN0    0x01
UMASK_WPQ_CYCLES_NO_SPEC_CREDITS_CHN1    0x02
UMASK_WPQ_CYCLES_NO_SPEC_CREDITS_CHN2    0x04
UMASK_WPQ_CYCLES_NO_SPEC_CREDITS_CHN3    0x08

EVENT_SNOOPS_RSP_AFTER_DATA             0x0A BBOX
UMASK_SNOOPS_RSP_AFTER_DATA_LOCAL       0x01
UMASK_SNOOPS_RSP_AFTER_DATA_REMOTE      0x02

EVENT_SNOOP_CYCLES_NE                   0x08 BBOX
UMASK_SNOOP_CYCLES_NE_LOCAL             0x01
UMASK_SNOOP_CYCLES_NE_REMOTE            0x02
UMASK_SNOOP_CYCLES_NE_ALL               0x03

EVENT_SNOOP_OCCUPANCY                   0x09 BBOX
UMASK_SNOOP_OCCUPANCY_LOCAL             0x01
UMASK_SNOOP_OCCUPANCY_REMOTE            0x02

EVENT_SNOOP_RESP                        0x21 BBOX
UMASK_SNOOP_RESP_RSPI                   0x01
UMASK_SNOOP_RESP_RSPS                   0x02
UMASK_SNOOP_RESP_RSPIFWD                0x04
UMASK_SNOOP_RESP_RSPSFWD                0x08
UMASK_SNOOP_RESP_RSP_WB                 0x10
UMASK_SNOOP_RESP_RSP_FWD_WB             0x20
UMASK_SNOOP_RESP_RSPCNFLCT              0x40

EVENT_SNP_RESP_RECV_LOCAL               0x60 BBOX
UMASK_SNP_RESP_RECV_LOCAL_RSPI          0x01
UMASK_SNP_RESP_RECV_LOCAL_RSPS          0x02
UMASK_SNP_RESP_RECV_LOCAL_RSPIFWD       0x04
UMASK_SNP_RESP_RECV_LOCAL_RSPSFWD       0x08
UMASK_SNP_RESP_RECV_LOCAL_RSPXWB        0x10
UMASK_SNP_RESP_RECV_LOCAL_RSPXFWDXWB    0x20
UMASK_SNP_RESP_RECV_LOCAL_RSPCNFLCT     0x40
UMASK_SNP_RESP_RECV_LOCAL_OTHER         0x80

EVENT_TAD_REQUESTS_G0                   0x1B BBOX
UMASK_TAD_REQUESTS_G0_REGION0           0x01
UMASK_TAD_REQUESTS_G0_REGION1           0x02
UMASK_TAD_REQUESTS_G0_REGION2           0x04
UMASK_TAD_REQUESTS_G0_REGION3           0x08
UMASK_TAD_REQUESTS_G0_REGION4           0x10
UMASK_TAD_REQUESTS_G0_REGION5           0x20
UMASK_TAD_REQUESTS_G0_REGION6           0x40
UMASK_TAD_REQUESTS_G0_REGION7           0x80

EVENT_TAD_REQUESTS_G1                   0x1C BBOX
UMASK_TAD_REQUESTS_G1_REGION8           0x01
UMASK_TAD_REQUESTS_G1_REGION9           0x02
UMASK_TAD_REQUESTS_G1_REGION10          0x04
UMASK_TAD_REQUESTS_G1_REGION11          0x08

EVENT_TRACKER_CYCLES_FULL               0x02 BBOX
UMASK_TRACKER_CYCLES_FULL_GP            0x01
UMASK_TRACKER_CYCLES_FULL_ALL           0x02

EVENT_TRACKER_CYCLES_NE                 0x03 BBOX
UMASK_TRACKER_CYCLES_NE_LOCAL           0x01
UMASK_TRACKER_CYCLES_NE_REMOTE          0x02
UMASK_TRACKER_CYCLES_NE_ALL             0x03

EVENT_TRACKER_OCCUPANCY                 0x04 BBOX
UMASK_TRACKER_OCCUPANCY_READS_LOCAL     0x04
UMASK_TRACKER_OCCUPANCY_READS_REMOTE    0x08
UMASK_TRACKER_OCCUPANCY_WRITES_LOCAL    0x10
UMASK_TRACKER_OCCUPANCY_WRITES_REMOTE   0x20
UMASK_TRACKER_OCCUPANCY_INVITOE_LOCAL   0x40
UMASK_TRACKER_OCCUPANCY_INVITOE_REMOTE  0x80

EVENT_TRACKER_PENDING_OCCUPANCY         0x05 BBOX
UMASK_TRACKER_PENDING_OCCUPANCY_LOCAL   0x01
UMASK_TRACKER_PENDING_OCCUPANCY_REMOTE  0x02

EVENT_TXR_AD_CYCLES_FULL                0x2A BBOX
UMASK_TXR_AD_CYCLES_FULL_SCHED0         0x01
UMASK_TXR_AD_CYCLES_FULL_SCHED1         0x02
UMASK_TXR_AD_CYCLES_FULL_ALL            0x03

EVENT_TXR_AK                            0x0E BBOX
UMASK_TXR_AK                            0x00

EVENT_TXR_AK_CYCLES_FULL                0x32 BBOX
UMASK_TXR_AK_CYCLES_FULL_SCHED0         0x01
UMASK_TXR_AK_CYCLES_FULL_SCHED1         0x02
UMASK_TXR_AK_CYCLES_FULL_ALL            0x03

EVENT_TXR_BL                            0x10 BBOX
UMASK_TXR_BL_DRS_CACHE                  0x01
UMASK_TXR_BL_DRS_CORE                   0x02
UMASK_TXR_BL_DRS_QPI                    0x04

EVENT_TXR_BL_CYCLES_FULL                0x36 BBOX
UMASK_TXR_BL_CYCLES_FULL_SCHED0         0x01
UMASK_TXR_BL_CYCLES_FULL_SCHED1         0x02
UMASK_TXR_BL_CYCLES_FULL_ALL            0x03

EVENT_TXR_BL_OCCUPANCY                  0x34 BBOX
UMASK_TXR_BL_OCCUPANCY                  0x00

EVENT_TXR_STARVED                       0x6D BBOX
UMASK_TXR_STARVED_AK                    0x01
UMASK_TXR_STARVED_BL                    0x02

EVENT_DRAM_CLOCKTICKS                   0x00 MBOX
UMASK_DRAM_CLOCKTICKS                   0x00

EVENT_ACT_COUNT                         0x01 MBOX
UMASK_ACT_COUNT_RD                      0x01
UMASK_ACT_COUNT_WR                      0x02
UMASK_ACT_COUNT_BYP                     0x08

EVENT_BYP_CMDS                          0xA1 MBOX
UMASK_BYP_CMDS_ACT                      0x01
UMASK_BYP_CMDS_CAS                      0x02
UMASK_BYP_CMDS_PRE                      0x04

EVENT_CAS_COUNT                         0x04 MBOX
UMASK_CAS_COUNT_RD_REG                  0x01
UMASK_CAS_COUNT_RD_UNDERFILL            0x02
UMASK_CAS_COUNT_RD                      0x03
UMASK_CAS_COUNT_RD_WMM                  0x10
UMASK_CAS_COUNT_RD_RMM                  0x20
UMASK_CAS_COUNT_WR_WMM                  0x04
UMASK_CAS_COUNT_WR_RMM                  0x08
UMASK_CAS_COUNT_WR                      0x0C
UMASK_CAS_COUNT_ALL                     0x0F

EVENT_DRAM_PRE_ALL                      0x06 MBOX
UMASK_DRAM_PRE_ALL                      0x00

EVENT_DRAM_REFRESH                      0x05 MBOX
UMASK_DRAM_REFRESH_PANIC                0x02
UMASK_DRAM_REFRESH_HIGH                 0x04

EVENT_ECC_CORRECTABLE_ERRORS            0x09 MBOX
UMASK_ECC_CORRECTABLE_ERRORS            0x00

EVENT_MAJOR_MODES                       0x07 MBOX
UMASK_MAJOR_MODES_READ                  0x01
UMASK_MAJOR_MODES_WRITE                 0x02
UMASK_MAJOR_MODES_PARTIAL               0x03
UMASK_MAJOR_MODES_ISOCH                 0x04

EVENT_POWER_CHANNEL_DLLOFF              0x84 MBOX
UMASK_POWER_CHANNEL_DLLOFF              0x00

EVENT_POWER_CHANNEL_PPD                 0x85 MBOX
UMASK_POWER_CHANNEL_PPD                 0x00

EVENT_POWER_CKE_CYCLES                  0x83 MBOX
UMASK_POWER_CKE_CYCLES_RANK0            0x01
UMASK_POWER_CKE_CYCLES_RANK1            0x02
UMASK_POWER_CKE_CYCLES_RANK2            0x04
UMASK_POWER_CKE_CYCLES_RANK3            0x08
UMASK_POWER_CKE_CYCLES_RANK4            0x10
UMASK_POWER_CKE_CYCLES_RANK5            0x20
UMASK_POWER_CKE_CYCLES_RANK6            0x40
UMASK_POWER_CKE_CYCLES_RANK7            0x80

EVENT_POWER_CRITICAL_THROTTLE_CYCLES    0x86 MBOX
UMASK_POWER_CRITICAL_THROTTLE_CYCLES    0x00

EVENT_POWER_PCU_THROTTLING              0x42 MBOX
UMASK_POWER_PCU_THROTTLING              0x00

EVENT_POWER_SELF_REFRESH                0x43 MBOX
UMASK_POWER_SELF_REFRESH                0x00

EVENT_POWER_THROTTLE_CYCLES             0x41 MBOX
UMASK_POWER_THROTTLE_CYCLES_RANK0       0x01
UMASK_POWER_THROTTLE_CYCLES_RANK1       0x02
UMASK_POWER_THROTTLE_CYCLES_RANK2       0x04
UMASK_POWER_THROTTLE_CYCLES_RANK3       0x08
UMASK_POWER_THROTTLE_CYCLES_RANK4       0x10
UMASK_POWER_THROTTLE_CYCLES_RANK5       0x20
UMASK_POWER_THROTTLE_CYCLES_RANK6       0x40
UMASK_POWER_THROTTLE_CYCLES_RANK7       0x80

EVENT_PREEMPTION                        0x08 MBOX
UMASK_PREEMPTION_RD_PREEMPT_RD          0x01
UMASK_PREEMPTION_RD_PREEMPT_WR          0x02

EVENT_PRE_COUNT                         0x02 MBOX
UMASK_PRE_COUNT_PAGE_MISS               0x01
UMASK_PRE_COUNT_PAGE_CLOSE              0x02
UMASK_PRE_COUNT_RD                      0x04
UMASK_PRE_COUNT_WR                      0x08
UMASK_PRE_COUNT_BYP                     0x10

EVENT_RD_CAS_PRIO                       0xA0 MBOX
UMASK_RD_CAS_PRIO_LOW                   0x01
UMASK_RD_CAS_PRIO_MED                   0x02
UMASK_RD_CAS_PRIO_HIGH                  0x04
UMASK_RD_CAS_PRIO_PANIC                 0x08

EVENT_RD_CAS_RANK0                      0xB0 MBOX
UMASK_RD_CAS_RANK0_BANK0                0x00
UMASK_RD_CAS_RANK0_BANK1                0x01
UMASK_RD_CAS_RANK0_BANK2                0x02
UMASK_RD_CAS_RANK0_BANK3                0x03
UMASK_RD_CAS_RANK0_BANK4                0x04
UMASK_RD_CAS_RANK0_BANK5                0x05
UMASK_RD_CAS_RANK0_BANK6                0x06
UMASK_RD_CAS_RANK0_BANK7                0x07
UMASK_RD_CAS_RANK0_BANK8                0x08
UMASK_RD_CAS_RANK0_BANK9                0x09
UMASK_RD_CAS_RANK0_BANK10               0x0A
UMASK_RD_CAS_RANK0_BANK11               0x0B
UMASK_RD_CAS_RANK0_BANK12               0x0C
UMASK_RD_CAS_RANK0_BANK13               0x0D
UMASK_RD_CAS_RANK0_BANK14               0x0E
UMASK_RD_CAS_RANK0_BANK15               0x0F
UMASK_RD_CAS_RANK0_ALLBANKS             0x10
UMASK_RD_CAS_RANK0_BANKG0               0x11
UMASK_RD_CAS_RANK0_BANKG1               0x12
UMASK_RD_CAS_RANK0_BANKG2               0x13
UMASK_RD_CAS_RANK0_BANKG3               0x14

EVENT_RD_CAS_RANK1                      0xB1 MBOX
UMASK_RD_CAS_RANK1_BANK0                0x00
UMASK_RD_CAS_RANK1_BANK1                0x01
UMASK_RD_CAS_RANK1_BANK2                0x02
UMASK_RD_CAS_RANK1_BANK3                0x03
UMASK_RD_CAS_RANK1_BANK4                0x04
UMASK_RD_CAS_RANK1_BANK5                0x05
UMASK_RD_CAS_RANK1_BANK6                0x06
UMASK_RD_CAS_RANK1_BANK7                0x07
UMASK_RD_CAS_RANK1_BANK8                0x08
UMASK_RD_CAS_RANK1_BANK9                0x09
UMASK_RD_CAS_RANK1_BANK10               0x0A
UMASK_RD_CAS_RANK1_BANK11               0x0B
UMASK_RD_CAS_RANK1_BANK12               0x0C
UMASK_RD_CAS_RANK1_BANK13               0x0D
UMASK_RD_CAS_RANK1_BANK14               0x0E
UMASK_RD_CAS_RANK1_BANK15               0x0F
UMASK_RD_CAS_RANK1_ALLBANKS             0x10
UMASK_RD_CAS_RANK1_BANKG0               0x11
UMASK_RD_CAS_RANK1_BANKG1               0x12
UMASK_RD_CAS_RANK1_BANKG2               0x13
UMASK_RD_CAS_RANK1_BANKG3               0x14

EVENT_RD_CAS_RANK2                      0xB2 MBOX
UMASK_RD_CAS_RANK2_BANK0                0x00
UMASK_RD_CAS_RANK2_BANK1                0x01
UMASK_RD_CAS_RANK2_BANK2                0x02
UMASK_RD_CAS_RANK2_BANK3                0x03
UMASK_RD_CAS_RANK2_BANK4                0x04
UMASK_RD_CAS_RANK2_BANK5                0x05
UMASK_RD_CAS_RANK2_BANK6                0x06
UMASK_RD_CAS_RANK2_BANK7                0x07
UMASK_RD_CAS_RANK2_BANK8                0x08
UMASK_RD_CAS_RANK2_BANK9                0x09
UMASK_RD_CAS_RANK2_BANK10               0x0A
UMASK_RD_CAS_RANK2_BANK11               0x0B
UMASK_RD_CAS_RANK2_BANK12               0x0C
UMASK_RD_CAS_RANK2_BANK13               0x0D
UMASK_RD_CAS_RANK2_BANK14               0x0E
UMASK_RD_CAS_RANK2_BANK15               0x0F
UMASK_RD_CAS_RANK2_ALLBANKS             0x10
UMASK_RD_CAS_RANK2_BANKG0               0x11
UMASK_RD_CAS_RANK2_BANKG1               0x12
UMASK_RD_CAS_RANK2_BANKG2               0x13
UMASK_RD_CAS_RANK2_BANKG3               0x14

EVENT_RD_CAS_RANK3                      0xB3 MBOX
UMASK_RD_CAS_RANK3_BANK0                0x00
UMASK_RD_CAS_RANK3_BANK1                0x01
UMASK_RD_CAS_RANK3_BANK2                0x02
UMASK_RD_CAS_RANK3_BANK3                0x03
UMASK_RD_CAS_RANK3_BANK4                0x04
UMASK_RD_CAS_RANK3_BANK5                0x05
UMASK_RD_CAS_RANK3_BANK6                0x06
UMASK_RD_CAS_RANK3_BANK7                0x07
UMASK_RD_CAS_RANK3_BANK8                0x08
UMASK_RD_CAS_RANK3_BANK9                0x09
UMASK_RD_CAS_RANK3_BANK10               0x0A
UMASK_RD_CAS_RANK3_BANK11               0x0B
UMASK_RD_CAS_RANK3_BANK12               0x0C
UMASK_RD_CAS_RANK3_BANK13               0x0D
UMASK_RD_CAS_RANK3_BANK14               0x0E
UMASK_RD_CAS_RANK3_BANK15               0x0F
UMASK_RD_CAS_RANK3_ALLBANKS             0x10
UMASK_RD_CAS_RANK3_BANKG0               0x11
UMASK_RD_CAS_RANK3_BANKG1               0x12
UMASK_RD_CAS_RANK3_BANKG2               0x13
UMASK_RD_CAS_RANK3_BANKG3               0x14

EVENT_RD_CAS_RANK4                      0xB4 MBOX
UMASK_RD_CAS_RANK4_BANK0                0x00
UMASK_RD_CAS_RANK4_BANK1                0x01
UMASK_RD_CAS_RANK4_BANK2                0x02
UMASK_RD_CAS_RANK4_BANK3                0x03
UMASK_RD_CAS_RANK4_BANK4                0x04
UMASK_RD_CAS_RANK4_BANK5                0x05
UMASK_RD_CAS_RANK4_BANK6                0x06
UMASK_RD_CAS_RANK4_BANK7                0x07
UMASK_RD_CAS_RANK4_BANK8                0x08
UMASK_RD_CAS_RANK4_BANK9                0x09
UMASK_RD_CAS_RANK4_BANK10               0x0A
UMASK_RD_CAS_RANK4_BANK11               0x0B
UMASK_RD_CAS_RANK4_BANK12               0x0C
UMASK_RD_CAS_RANK4_BANK13               0x0D
UMASK_RD_CAS_RANK4_BANK14               0x0E
UMASK_RD_CAS_RANK4_BANK15               0x0F
UMASK_RD_CAS_RANK4_ALLBANKS             0x10
UMASK_RD_CAS_RANK4_BANKG0               0x11
UMASK_RD_CAS_RANK4_BANKG1               0x12
UMASK_RD_CAS_RANK4_BANKG2               0x13
UMASK_RD_CAS_RANK4_BANKG3               0x14

EVENT_RD_CAS_RANK5                      0xB5 MBOX
UMASK_RD_CAS_RANK5_BANK0                0x00
UMASK_RD_CAS_RANK5_BANK1                0x01
UMASK_RD_CAS_RANK5_BANK2                0x02
UMASK_RD_CAS_RANK5_BANK3                0x03
UMASK_RD_CAS_RANK5_BANK4                0x04
UMASK_RD_CAS_RANK5_BANK5                0x05
UMASK_RD_CAS_RANK5_BANK6                0x06
UMASK_RD_CAS_RANK5_BANK7                0x07
UMASK_RD_CAS_RANK5_BANK8                0x08
UMASK_RD_CAS_RANK5_BANK9                0x09
UMASK_RD_CAS_RANK5_BANK10               0x0A
UMASK_RD_CAS_RANK5_BANK11               0x0B
UMASK_RD_CAS_RANK5_BANK12               0x0C
UMASK_RD_CAS_RANK5_BANK13               0x0D
UMASK_RD_CAS_RANK5_BANK14               0x0E
UMASK_RD_CAS_RANK5_BANK15               0x0F
UMASK_RD_CAS_RANK5_ALLBANKS             0x10
UMASK_RD_CAS_RANK5_BANKG0               0x11
UMASK_RD_CAS_RANK5_BANKG1               0x12
UMASK_RD_CAS_RANK5_BANKG2               0x13
UMASK_RD_CAS_RANK5_BANKG3               0x14

EVENT_RD_CAS_RANK6                      0xB6 MBOX
UMASK_RD_CAS_RANK6_BANK0                0x00
UMASK_RD_CAS_RANK6_BANK1                0x01
UMASK_RD_CAS_RANK6_BANK2                0x02
UMASK_RD_CAS_RANK6_BANK3                0x03
UMASK_RD_CAS_RANK6_BANK4                0x04
UMASK_RD_CAS_RANK6_BANK5                0x05
UMASK_RD_CAS_RANK6_BANK6                0x06
UMASK_RD_CAS_RANK6_BANK7                0x07
UMASK_RD_CAS_RANK6_BANK8                0x08
UMASK_RD_CAS_RANK6_BANK9                0x09
UMASK_RD_CAS_RANK6_BANK10               0x0A
UMASK_RD_CAS_RANK6_BANK11               0x0B
UMASK_RD_CAS_RANK6_BANK12               0x0C
UMASK_RD_CAS_RANK6_BANK13               0x0D
UMASK_RD_CAS_RANK6_BANK14               0x0E
UMASK_RD_CAS_RANK6_BANK15               0x0F
UMASK_RD_CAS_RANK6_ALLBANKS             0x10
UMASK_RD_CAS_RANK6_BANKG0               0x11
UMASK_RD_CAS_RANK6_BANKG1               0x12
UMASK_RD_CAS_RANK6_BANKG2               0x13
UMASK_RD_CAS_RANK6_BANKG3               0x14

EVENT_RD_CAS_RANK7                      0xB7 MBOX
UMASK_RD_CAS_RANK7_BANK0                0x00
UMASK_RD_CAS_RANK7_BANK1                0x01
UMASK_RD_CAS_RANK7_BANK2                0x02
UMASK_RD_CAS_RANK7_BANK3                0x03
UMASK_RD_CAS_RANK7_BANK4                0x04
UMASK_RD_CAS_RANK7_BANK5                0x05
UMASK_RD_CAS_RANK7_BANK6                0x06
UMASK_RD_CAS_RANK7_BANK7                0x07
UMASK_RD_CAS_RANK7_BANK8                0x08
UMASK_RD_CAS_RANK7_BANK9                0x09
UMASK_RD_CAS_RANK7_BANK10               0x0A
UMASK_RD_CAS_RANK7_BANK11               0x0B
UMASK_RD_CAS_RANK7_BANK12               0x0C
UMASK_RD_CAS_RANK7_BANK13               0x0D
UMASK_RD_CAS_RANK7_BANK14               0x0E
UMASK_RD_CAS_RANK7_BANK15               0x0F
UMASK_RD_CAS_RANK7_ALLBANKS             0x10
UMASK_RD_CAS_RANK7_BANKG0               0x11
UMASK_RD_CAS_RANK7_BANKG1               0x12
UMASK_RD_CAS_RANK7_BANKG2               0x13
UMASK_RD_CAS_RANK7_BANKG3               0x14

EVENT_RPQ_CYCLES_NE                     0x11 MBOX
UMASK_RPQ_CYCLES_NE                     0x00

EVENT_RPQ_INSERTS                       0x10 MBOX
UMASK_RPQ_INSERTS                       0x00

EVENT_VMSE_MXB_WR_OCCUPANCY             0x91 MBOX
UMASK_VMSE_MXB_WR_OCCUPANCY             0x00

EVENT_VMSE_WR_PUSH                      0x90 MBOX
UMASK_VMSE_WR_PUSH_WMM                  0x01
UMASK_VMSE_WR_PUSH_RMM                  0x02

EVENT_WMM_TO_RMM                        0xC0 MBOX
UMASK_WMM_TO_RMM_LOW_THRESH             0x01
UMASK_WMM_TO_RMM_STARVE                 0x02
UMASK_WMM_TO_RMM_VMSE_RETRY             0x04

# Undocumented event, mentioned in metrics table but not defined
EVENT_WPQ_INSERTS                       0x20 MBOX
UMASK_WPQ_INSERTS                       0x00

EVENT_WPQ_CYCLES_FULL                   0x22 MBOX
UMASK_WPQ_CYCLES_FULL                   0x00

EVENT_WPQ_CYCLES_NE                     0x21 MBOX
UMASK_WPQ_CYCLES_NE                     0x00

EVENT_WPQ_READ_HIT                      0x23 MBOX
UMASK_WPQ_READ_HIT                      0x00

EVENT_WPQ_WRITE_HIT                     0x24 MBOX
UMASK_WPQ_WRITE_HIT                     0x00

EVENT_WR_CAS_RANK0                      0xB8 MBOX
UMASK_WR_CAS_RANK0_BANK0                0x00
UMASK_WR_CAS_RANK0_BANK1                0x01
UMASK_WR_CAS_RANK0_BANK2                0x02
UMASK_WR_CAS_RANK0_BANK3                0x03
UMASK_WR_CAS_RANK0_BANK4                0x04
UMASK_WR_CAS_RANK0_BANK5                0x05
UMASK_WR_CAS_RANK0_BANK6                0x06
UMASK_WR_CAS_RANK0_BANK7                0x07
UMASK_WR_CAS_RANK0_BANK8                0x08
UMASK_WR_CAS_RANK0_BANK9                0x09
UMASK_WR_CAS_RANK0_BANK10               0x0A
UMASK_WR_CAS_RANK0_BANK11               0x0B
UMASK_WR_CAS_RANK0_BANK12               0x0C
UMASK_WR_CAS_RANK0_BANK13               0x0D
UMASK_WR_CAS_RANK0_BANK14               0x0E
UMASK_WR_CAS_RANK0_BANK15               0x0F
UMASK_WR_CAS_RANK0_ALLBANKS             0x10
UMASK_WR_CAS_RANK0_BANKG0               0x11
UMASK_WR_CAS_RANK0_BANKG1               0x12
UMASK_WR_CAS_RANK0_BANKG2               0x13
UMASK_WR_CAS_RANK0_BANKG3               0x14

EVENT_WR_CAS_RANK1                      0xB9 MBOX
UMASK_WR_CAS_RANK1_BANK0                0x00
UMASK_WR_CAS_RANK1_BANK1                0x01
UMASK_WR_CAS_RANK1_BANK2                0x02
UMASK_WR_CAS_RANK1_BANK3                0x03
UMASK_WR_CAS_RANK1_BANK4                0x04
UMASK_WR_CAS_RANK1_BANK5                0x05
UMASK_WR_CAS_RANK1_BANK6                0x06
UMASK_WR_CAS_RANK1_BANK7                0x07
UMASK_WR_CAS_RANK1_BANK8                0x08
UMASK_WR_CAS_RANK1_BANK9                0x09
UMASK_WR_CAS_RANK1_BANK10               0x0A
UMASK_WR_CAS_RANK1_BANK11               0x0B
UMASK_WR_CAS_RANK1_BANK12               0x0C
UMASK_WR_CAS_RANK1_BANK13               0x0D
UMASK_WR_CAS_RANK1_BANK14               0x0E
UMASK_WR_CAS_RANK1_BANK15               0x0F
UMASK_WR_CAS_RANK1_ALLBANKS             0x10
UMASK_WR_CAS_RANK1_BANKG0               0x11
UMASK_WR_CAS_RANK1_BANKG1               0x12
UMASK_WR_CAS_RANK1_BANKG2               0x13
UMASK_WR_CAS_RANK1_BANKG3               0x14

EVENT_WR_CAS_RANK2                      0xBA MBOX
UMASK_WR_CAS_RANK2_BANK0                0x00
UMASK_WR_CAS_RANK2_BANK1                0x01
UMASK_WR_CAS_RANK2_BANK2                0x02
UMASK_WR_CAS_RANK2_BANK3                0x03
UMASK_WR_CAS_RANK2_BANK4                0x04
UMASK_WR_CAS_RANK2_BANK5                0x05
UMASK_WR_CAS_RANK2_BANK6                0x06
UMASK_WR_CAS_RANK2_BANK7                0x07
UMASK_WR_CAS_RANK2_BANK8                0x08
UMASK_WR_CAS_RANK2_BANK9                0x09
UMASK_WR_CAS_RANK2_BANK10               0x0A
UMASK_WR_CAS_RANK2_BANK11               0x0B
UMASK_WR_CAS_RANK2_BANK12               0x0C
UMASK_WR_CAS_RANK2_BANK13               0x0D
UMASK_WR_CAS_RANK2_BANK14               0x0E
UMASK_WR_CAS_RANK2_BANK15               0x0F
UMASK_WR_CAS_RANK2_ALLBANKS             0x10
UMASK_WR_CAS_RANK2_BANKG0               0x11
UMASK_WR_CAS_RANK2_BANKG1               0x12
UMASK_WR_CAS_RANK2_BANKG2               0x13
UMASK_WR_CAS_RANK2_BANKG3               0x14

EVENT_WR_CAS_RANK3                      0xBB MBOX
UMASK_WR_CAS_RANK3_BANK0                0x00
UMASK_WR_CAS_RANK3_BANK1                0x01
UMASK_WR_CAS_RANK3_BANK2                0x02
UMASK_WR_CAS_RANK3_BANK3                0x03
UMASK_WR_CAS_RANK3_BANK4                0x04
UMASK_WR_CAS_RANK3_BANK5                0x05
UMASK_WR_CAS_RANK3_BANK6                0x06
UMASK_WR_CAS_RANK3_BANK7                0x07
UMASK_WR_CAS_RANK3_BANK8                0x08
UMASK_WR_CAS_RANK3_BANK9                0x09
UMASK_WR_CAS_RANK3_BANK10               0x0A
UMASK_WR_CAS_RANK3_BANK11               0x0B
UMASK_WR_CAS_RANK3_BANK12               0x0C
UMASK_WR_CAS_RANK3_BANK13               0x0D
UMASK_WR_CAS_RANK3_BANK14               0x0E
UMASK_WR_CAS_RANK3_BANK15               0x0F
UMASK_WR_CAS_RANK3_ALLBANKS             0x10
UMASK_WR_CAS_RANK3_BANKG0               0x11
UMASK_WR_CAS_RANK3_BANKG1               0x12
UMASK_WR_CAS_RANK3_BANKG2               0x13
UMASK_WR_CAS_RANK3_BANKG3               0x14

EVENT_WR_CAS_RANK4                      0xBC MBOX
UMASK_WR_CAS_RANK4_BANK0                0x00
UMASK_WR_CAS_RANK4_BANK1                0x01
UMASK_WR_CAS_RANK4_BANK2                0x02
UMASK_WR_CAS_RANK4_BANK3                0x03
UMASK_WR_CAS_RANK4_BANK4                0x04
UMASK_WR_CAS_RANK4_BANK5                0x05
UMASK_WR_CAS_RANK4_BANK6                0x06
UMASK_WR_CAS_RANK4_BANK7                0x07
UMASK_WR_CAS_RANK4_BANK8                0x08
UMASK_WR_CAS_RANK4_BANK9                0x09
UMASK_WR_CAS_RANK4_BANK10               0x0A
UMASK_WR_CAS_RANK4_BANK11               0x0B
UMASK_WR_CAS_RANK4_BANK12               0x0C
UMASK_WR_CAS_RANK4_BANK13               0x0D
UMASK_WR_CAS_RANK4_BANK14               0x0E
UMASK_WR_CAS_RANK4_BANK15               0x0F
UMASK_WR_CAS_RANK4_ALLBANKS             0x10
UMASK_WR_CAS_RANK4_BANKG0               0x11
UMASK_WR_CAS_RANK4_BANKG1               0x12
UMASK_WR_CAS_RANK4_BANKG2               0x13
UMASK_WR_CAS_RANK4_BANKG3               0x14

EVENT_WR_CAS_RANK5                      0xBD MBOX
UMASK_WR_CAS_RANK5_BANK0                0x00
UMASK_WR_CAS_RANK5_BANK1                0x01
UMASK_WR_CAS_RANK5_BANK2                0x02
UMASK_WR_CAS_RANK5_BANK3                0x03
UMASK_WR_CAS_RANK5_BANK4                0x04
UMASK_WR_CAS_RANK5_BANK5                0x05
UMASK_WR_CAS_RANK5_BANK6                0x06
UMASK_WR_CAS_RANK5_BANK7                0x07
UMASK_WR_CAS_RANK5_BANK8                0x08
UMASK_WR_CAS_RANK5_BANK9                0x09
UMASK_WR_CAS_RANK5_BANK10               0x0A
UMASK_WR_CAS_RANK5_BANK11               0x0B
UMASK_WR_CAS_RANK5_BANK12               0x0C
UMASK_WR_CAS_RANK5_BANK13               0x0D
UMASK_WR_CAS_RANK5_BANK14               0x0E
UMASK_WR_CAS_RANK5_BANK15               0x0F
UMASK_WR_CAS_RANK5_ALLBANKS             0x10
UMASK_WR_CAS_RANK5_BANKG0               0x11
UMASK_WR_CAS_RANK5_BANKG1               0x12
UMASK_WR_CAS_RANK5_BANKG2               0x13
UMASK_WR_CAS_RANK5_BANKG3               0x14

EVENT_WR_CAS_RANK6                      0xBE MBOX
UMASK_WR_CAS_RANK6_BANK0                0x00
UMASK_WR_CAS_RANK6_BANK1                0x01
UMASK_WR_CAS_RANK6_BANK2                0x02
UMASK_WR_CAS_RANK6_BANK3                0x03
UMASK_WR_CAS_RANK6_BANK4                0x04
UMASK_WR_CAS_RANK6_BANK5                0x05
UMASK_WR_CAS_RANK6_BANK6                0x06
UMASK_WR_CAS_RANK6_BANK7                0x07
UMASK_WR_CAS_RANK6_BANK8                0x08
UMASK_WR_CAS_RANK6_BANK9                0x09
UMASK_WR_CAS_RANK6_BANK10               0x0A
UMASK_WR_CAS_RANK6_BANK11               0x0B
UMASK_WR_CAS_RANK6_BANK12               0x0C
UMASK_WR_CAS_RANK6_BANK13               0x0D
UMASK_WR_CAS_RANK6_BANK14               0x0E
UMASK_WR_CAS_RANK6_BANK15               0x0F
UMASK_WR_CAS_RANK6_ALLBANKS             0x10
UMASK_WR_CAS_RANK6_BANKG0               0x11
UMASK_WR_CAS_RANK6_BANKG1               0x12
UMASK_WR_CAS_RANK6_BANKG2               0x13
UMASK_WR_CAS_RANK6_BANKG3               0x14

EVENT_WR_CAS_RANK7                      0xBF MBOX
UMASK_WR_CAS_RANK7_BANK0                0x00
UMASK_WR_CAS_RANK7_BANK1                0x01
UMASK_WR_CAS_RANK7_BANK2                0x02
UMASK_WR_CAS_RANK7_BANK3                0x03
UMASK_WR_CAS_RANK7_BANK4                0x04
UMASK_WR_CAS_RANK7_BANK5                0x05
UMASK_WR_CAS_RANK7_BANK6                0x06
UMASK_WR_CAS_RANK7_BANK7                0x07
UMASK_WR_CAS_RANK7_BANK8                0x08
UMASK_WR_CAS_RANK7_BANK9                0x09
UMASK_WR_CAS_RANK7_BANK10               0x0A
UMASK_WR_CAS_RANK7_BANK11               0x0B
UMASK_WR_CAS_RANK7_BANK12               0x0C
UMASK_WR_CAS_RANK7_BANK13               0x0D
UMASK_WR_CAS_RANK7_BANK14               0x0E
UMASK_WR_CAS_RANK7_BANK15               0x0F
UMASK_WR_CAS_RANK7_ALLBANKS             0x10
UMASK_WR_CAS_RANK7_BANKG0               0x11
UMASK_WR_CAS_RANK7_BANKG1               0x12
UMASK_WR_CAS_RANK7_BANKG2               0x13
UMASK_WR_CAS_RANK7_BANKG3               0x14

EVENT_PBOX_CLOCKTICKS                   0x01 PBOX
UMASK_PBOX_CLOCKTICKS                   0x00

EVENT_IIO_CREDIT                        0x2D PBOX0|PBOX1
UMASK_IIO_CREDIT_PRQ_QPI0               0x01
UMASK_IIO_CREDIT_PRQ_QPI1               0x02
UMASK_IIO_CREDIT_ISOCH_QPI0             0x04
UMASK_IIO_CREDIT_ISOCH_QPI1             0x08

EVENT_R2PCIE_RING_AD_USED                      0x07 PBOX
UMASK_R2PCIE_RING_AD_USED_CW_EVEN              0x01
UMASK_R2PCIE_RING_AD_USED_CW_ODD               0x02
UMASK_R2PCIE_RING_AD_USED_CW                   0x03
UMASK_R2PCIE_RING_AD_USED_CCW_EVEN             0x04
UMASK_R2PCIE_RING_AD_USED_CCW_ODD              0x08
UMASK_R2PCIE_RING_AD_USED_CCW                  0x0C

EVENT_RING_AK_BOUNCES                   0x12 PBOX
UMASK_RING_AK_BOUNCES_UP                0x01
UMASK_RING_AK_BOUNCES_DN                0x02

EVENT_R2PCIE_RING_AK_USED                      0x08 PBOX
UMASK_R2PCIE_RING_AK_USED_CW_EVEN              0x01
UMASK_R2PCIE_RING_AK_USED_CW_ODD               0x02
UMASK_R2PCIE_RING_AK_USED_CW                   0x03
UMASK_R2PCIE_RING_AK_USED_CCW_EVEN             0x04
UMASK_R2PCIE_RING_AK_USED_CCW_ODD              0x08
UMASK_R2PCIE_RING_AK_USED_CCW                  0x0C

EVENT_R2PCIE_RING_BL_USED                      0x09 PBOX
UMASK_R2PCIE_RING_BL_USED_CW_EVEN              0x01
UMASK_R2PCIE_RING_BL_USED_CW_ODD               0x02
UMASK_R2PCIE_RING_BL_USED_CW                   0x03
UMASK_R2PCIE_RING_BL_USED_CCW_EVEN             0x04
UMASK_R2PCIE_RING_BL_USED_CCW_ODD              0x08
UMASK_R2PCIE_RING_BL_USED_CCW                  0x0C

EVENT_R2PCIE_RING_IV_USED                      0x0A PBOX
UMASK_R2PCIE_RING_IV_USED_CW                   0x03
UMASK_R2PCIE_RING_IV_USED_CCW                  0x0C
UMASK_R2PCIE_RING_IV_USED_ANY                  0x0F

EVENT_RXR_CYCLES_NE                     0x10 PBOX0|PBOX1|RBOX0C0|RBOX0C1|RBOX1C0|RBOX1C1
UMASK_RXR_CYCLES_NE_NCB                 0x10
UMASK_RXR_CYCLES_NE_NCS                 0x20

EVENT_RXR_INSERTS                       0x11 PBOX0|PBOX1|RBOX0C0|RBOX0C1|RBOX1C0|RBOX1C1
UMASK_RXR_INSERTS_NCB                   0x10
UMASK_RXR_INSERTS_NCS                   0x20

EVENT_RXR_OCCUPANCY                     0x13 PBOX0
UMASK_RXR_OCCUPANCY_DRS                 0x08

EVENT_R2PCIE_TXR_CYCLES_FULL                   0x25 PBOX0
UMASK_R2PCIE_TXR_CYCLES_FULL_AD                0x01
UMASK_R2PCIE_TXR_CYCLES_FULL_AK                0x02
UMASK_R2PCIE_TXR_CYCLES_FULL_BL                0x04

EVENT_R2PCIE_TXR_CYCLES_NE                     0x23 PBOX0
UMASK_R2PCIE_TXR_CYCLES_NE_AD                  0x01
UMASK_R2PCIE_TXR_CYCLES_NE_AK                  0x02
UMASK_R2PCIE_TXR_CYCLES_NE_BL                  0x04

EVENT_TXR_NACK                       0x26 PBOX|RBOX0C0|RBOX0C1|RBOX1C0|RBOX1C1
UMASK_TXR_NACK_DN_AD                 0x01
UMASK_TXR_NACK_DN_BL                 0x02
UMASK_TXR_NACK_DN_AK                 0x04
UMASK_TXR_NACK_UP_AD                 0x08
UMASK_TXR_NACK_UP_BL                 0x10
UMASK_TXR_NACK_UP_AK                 0x20
UMASK_TXR_NACK_AD                    0x09
UMASK_TXR_NACK_BL                    0x12
UMASK_TXR_NACK_AK                    0x24
UMASK_TXR_NACK_ANY                   0x3F

EVENT_IBOX_CLOCKTICKS                   0x00 IBOX
UMASK_IBOX_CLOCKTICKS                   0x00

EVENT_CACHE_TOTAL_OCCUPANCY             0x12 IBOX
UMASK_CACHE_TOTAL_OCCUPANCY_ANY         0x01
UMASK_CACHE_TOTAL_OCCUPANCY_SOURCE      0x02

EVENT_COHERENT_OPS                      0x13 IBOX
UMASK_COHERENT_OPS_PCIRDCUR             0x01
UMASK_COHERENT_OPS_CRD                  0x02
UMASK_COHERENT_OPS_DRD                  0x04
UMASK_COHERENT_OPS_RFO                  0x08
UMASK_COHERENT_OPS_PCITOM               0x10
UMASK_COHERENT_OPS_PCIDCAHINT           0x20
UMASK_COHERENT_OPS_WBMTOI               0x40
UMASK_COHERENT_OPS_CLFLUSH              0x80

EVENT_MISC0                             0x14 IBOX
UMASK_MISC0_FAST_REQ                    0x01
UMASK_MISC0_FAST_REJ                    0x02
UMASK_MISC0_2ND_RD_INSERT               0x04
UMASK_MISC0_2ND_WR_INSERT               0x08
UMASK_MISC0_2ND_ATOMIC_INSERT           0x10
UMASK_MISC0_INSERTS                     0x1C
UMASK_MISC0_FAST_XFER                   0x20
UMASK_MISC0_PF_ACK_HINT                 0x40
UMASK_MISC0_PF_TIMEOUT                  0x80

EVENT_MISC1                             0x15 IBOX
UMASK_MISC1_SLOW_I                      0x01
UMASK_MISC1_SLOW_S                      0x02
UMASK_MISC1_SLOW_E                      0x04
UMASK_MISC1_SLOW_M                      0x08
UMASK_MISC1_SLOW                        0x0F
UMASK_MISC1_LOST_FWD                    0x10
UMASK_MISC1_SEC_RCVD_INVLD              0x20
UMASK_MISC1_SEC_RCVD_VLD                0x40
UMASK_MISC1_DATA_THROTTLE               0x80

EVENT_SNOOP_RESP                        0x17 IBOX
UMASK_SNOOP_RESP_MISS                   0x01
UMASK_SNOOP_RESP_HIT_I                  0x02
UMASK_SNOOP_RESP_HIT_ES                 0x04
UMASK_SNOOP_RESP_HIT_M                  0x08
UMASK_SNOOP_RESP_HIT                    0x0E
UMASK_SNOOP_RESP_SNPCODE                0x10
UMASK_SNOOP_RESP_SNPDATA                0x20
UMASK_SNOOP_RESP_SNPINV                 0x40

EVENT_TRANSACTIONS                      0x16 IBOX
UMASK_TRANSACTIONS_READS                0x01
UMASK_TRANSACTIONS_WRITES               0x02
UMASK_TRANSACTIONS_RD_PREF              0x04
UMASK_TRANSACTIONS_WR_PREF              0x08
UMASK_TRANSACTIONS_ALL_READS            0x05
UMASK_TRANSACTIONS_ALL_WRITES           0x0A
UMASK_TRANSACTIONS_ATOMIC               0x10
UMASK_TRANSACTIONS_OTHER                0x20
UMASK_TRANSACTIONS_ORDERINGQ            0x40

EVENT_RXR_AK_INSERTS                    0x0A IBOX
UMASK_RXR_AK_INSERTS                    0x00

EVENT_RXR_BL_DRS_CYCLES_FULL            0x04 IBOX
UMASK_RXR_BL_DRS_CYCLES_FULL            0x00

EVENT_RXR_BL_DRS_INSERTS                0x01 IBOX
UMASK_RXR_BL_DRS_INSERTS                0x00

EVENT_RXR_BL_DRS_OCCUPANCY              0x07 IBOX
UMASK_RXR_BL_DRS_OCCUPANCY              0x00

EVENT_RXR_BL_NCB_CYCLES_FULL            0x05 IBOX
UMASK_RXR_BL_NCB_CYCLES_FULL            0x00

EVENT_RXR_BL_NCB_INSERTS                0x02 IBOX
UMASK_RXR_BL_NCB_INSERTS                0x00

EVENT_RXR_BL_NCB_OCCUPANCY              0x08 IBOX
UMASK_RXR_BL_NCB_OCCUPANCY              0x00

EVENT_RXR_BL_NCS_CYCLES_FULL            0x06 IBOX
UMASK_RXR_BL_NCS_CYCLES_FULL            0x00

EVENT_RXR_BL_NCS_INSERTS                0x03 IBOX
UMASK_RXR_BL_NCS_INSERTS                0x00

EVENT_RXR_BL_NCS_OCCUPANCY              0x09 IBOX
UMASK_RXR_BL_NCS_OCCUPANCY              0x00

EVENT_TXR_AD_STALL_CREDIT_CYCLES        0x18 IBOX
UMASK_TXR_AD_STALL_CREDIT_CYCLES        0x00

EVENT_TXR_BL_STALL_CREDIT_CYCLES        0x19 IBOX
UMASK_TXR_BL_STALL_CREDIT_CYCLES        0x00

EVENT_TXR_DATA_INSERTS_NCB              0x0E IBOX
UMASK_TXR_DATA_INSERTS_NCB              0x00

EVENT_TXR_DATA_INSERTS_NCS              0x0F IBOX
UMASK_TXR_DATA_INSERTS_NCS              0x00

EVENT_TXR_REQUEST_OCCUPANCY             0x0D IBOX
UMASK_TXR_REQUEST_OCCUPANCY             0x00
