SHORT  L1 Instruction TLB miss rate/ratio

EVENTSET
FIXC0 INSTR_RETIRED_ANY
FIXC1 CPU_CLK_UNHALTED_CORE
FIXC2 CPU_CLK_UNHALTED_REF
PMC0  ITLB_MISSES_WALK_COMPLETED
PMC1  ITLB_MISSES_WALK_ACTIVE

METRICS
Runtime (RDTSC) [s] time
Runtime unhalted [s] FIXC1*inverseClock
Clock [MHz]  1.E-06*(FIXC1/FIXC2)/inverseClock
CPI  FIXC1/FIXC0
L1 ITLB misses     PMC0
L1 ITLB miss rate  PMC0/FIXC0
L1 ITLB miss duration [Cyc] PMC1/PMC0


LONG
Formulas:
L1 ITLB misses = ITLB_MISSES_WALK_COMPLETED
L1 ITLB miss rate = ITLB_MISSES_WALK_COMPLETED / INSTR_RETIRED_ANY
L1 ITLB miss duration [Cyc] = ITLB_MISSES_WALK_ACTIVE / ITLB_MISSES_WALK_COMPLETED
-
The ITLB miss rates gives a measure how often a TLB miss occurred
per instruction. The duration measures the time in cycles how long a walk did take.

