# =======================================================================================
#
#      Filename:  perfmon_ivybridge_events.txt
#
#      Description:  Event list for Intel Ivy Bridge
#
#      Version:   5.4.1
#      Released:  09.12.2024
#
#      Author:   Jan Treibig (jt), jan.treibig@gmail.com
#                Thomas Gruber (tr), thomas.roehl@googlemail.com
#      Project:  likwid
#
#      Copyright (C) 2024 RRZE, University Erlangen-Nuremberg
#
#      This program is free software: you can redistribute it and/or modify it under
#      the terms of the GNU General Public License as published by the Free Software
#      Foundation, either version 3 of the License, or (at your option) any later
#      version.
#
#      This program is distributed in the hope that it will be useful, but WITHOUT ANY
#      WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A
#      PARTICULAR PURPOSE.  See the GNU General Public License for more details.
#
#      You should have received a copy of the GNU General Public License along with
#      this program.  If not, see <http://www.gnu.org/licenses/>.
#
# =======================================================================================

EVENT_TEMP_CORE               0x00   TMP0
UMASK_TEMP_CORE               0x00

EVENT_PWR_PKG_ENERGY          0x02   PWR0
UMASK_PWR_PKG_ENERGY          0x00

EVENT_PWR_PP0_ENERGY          0x01   PWR1
UMASK_PWR_PP0_ENERGY          0x00

EVENT_PWR_PP1_ENERGY          0x04   PWR2
UMASK_PWR_PP1_ENERGY          0x00

EVENT_PWR_DRAM_ENERGY         0x03   PWR3
UMASK_PWR_DRAM_ENERGY         0x00

EVENT_VOLTAGE_CORE          0x00   VTG0
UMASK_VOLTAGE_CORE          0x00

EVENT_INSTR_RETIRED           0x00   FIXC0
UMASK_INSTR_RETIRED_ANY       0x00

EVENT_CPU_CLK_UNHALTED        0x00   FIXC1
UMASK_CPU_CLK_UNHALTED_CORE   0x00

EVENT_CPU_CLK_UNHALTED        0x00   FIXC2
UMASK_CPU_CLK_UNHALTED_REF    0x00

EVENT_LD_BLOCKS                 0x03  PMC
UMASK_LD_BLOCKS_STORE_FORWARD   0x02
UMASK_LD_BLOCKS_NO_SR           0x08

EVENT_MISALIGN_MEM_REF            0x05  PMC
UMASK_MISALIGN_MEM_REF_LOADS      0x01
UMASK_MISALIGN_MEM_REF_STORES     0x02
UMASK_MISALIGN_MEM_REF_ANY        0x03

EVENT_LD_BLOCKS_PARTIAL                 0x07  PMC
UMASK_LD_BLOCKS_PARTIAL_ADDRESS_ALIAS   0x01

EVENT_DTLB_LOAD_MISSES                 0x08  PMC
UMASK_DTLB_LOAD_MISSES_CAUSES_A_WALK   0x81
UMASK_DTLB_LOAD_MISSES_WALK_COMPLETED  0x82
UMASK_DTLB_LOAD_MISSES_WALK_DURATION   0x84

EVENT_INT_MISC                       0x0D  PMC
DEFAULT_OPTIONS_INT_MISC_RECOVERY_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_INT_MISC_RECOVERY_CYCLES       0x03
DEFAULT_OPTIONS_INT_MISC_RECOVERY_COUNT EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_EDGE=1
UMASK_INT_MISC_RECOVERY_COUNT        0x03
DEFAULT_OPTIONS_INT_MISC_RECOVERY_CYCLES_ANY EVENT_OPTION_ANYTHREAD=0x1
UMASK_INT_MISC_RECOVERY_CYCLES_ANY      0x03
DEFAULT_OPTIONS_INT_MISC_RECOVERY_COUNT_ANY EVENT_OPTION_ANYTHREAD=0x1,EVENT_OPTION_EDGE=1
UMASK_INT_MISC_RECOVERY_COUNT_ANY       0x03

EVENT_UOPS_ISSUED                0x0E  PMC
UMASK_UOPS_ISSUED_ANY            0x01
UMASK_UOPS_ISSUED_FLAGS_MERGE    0x10
UMASK_UOPS_ISSUED_SLOW_LEA       0x20
UMASK_UOPS_ISSUED_SINGLE_MUL     0x40
DEFAULT_OPTIONS_UOPS_ISSUED_USED_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_ISSUED_USED_CYCLES   0x01
DEFAULT_OPTIONS_UOPS_ISSUED_STALL_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1
UMASK_UOPS_ISSUED_STALL_CYCLES   0x01
DEFAULT_OPTIONS_UOPS_ISSUED_TOTAL_CYCLES EVENT_OPTION_THRESHOLD=0xA,EVENT_OPTION_INVERT=1
UMASK_UOPS_ISSUED_TOTAL_CYCLES   0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CORE_USED_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_ISSUED_CORE_USED_CYCLES   0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CORE_STALL_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1,EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_ISSUED_CORE_STALL_CYCLES   0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CORE_TOTAL_CYCLES EVENT_OPTION_THRESHOLD=0xA,EVENT_OPTION_INVERT=1,EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_ISSUED_CORE_TOTAL_CYCLES   0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CYCLES_GE_1_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_ISSUED_CYCLES_GE_1_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CYCLES_GE_2_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x2
UMASK_UOPS_ISSUED_CYCLES_GE_2_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CYCLES_GE_3_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x3
UMASK_UOPS_ISSUED_CYCLES_GE_3_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CYCLES_GE_4_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x4
UMASK_UOPS_ISSUED_CYCLES_GE_4_UOPS_EXEC 0x01


EVENT_FP_COMP_OPS_EXE                          0x10   PMC
UMASK_FP_COMP_OPS_EXE_X87                      0x01
UMASK_FP_COMP_OPS_EXE_SSE_FP_PACKED_DOUBLE     0x10
UMASK_FP_COMP_OPS_EXE_SSE_FP_SCALAR_SINGLE     0x20
UMASK_FP_COMP_OPS_EXE_SSE_FP_PACKED_SINGLE     0x40
UMASK_FP_COMP_OPS_EXE_SSE_FP_SCALAR_DOUBLE     0x80

EVENT_SIMD_FP_256_PACKED            0x11   PMC
UMASK_SIMD_FP_256_PACKED_SINGLE     0x01
UMASK_SIMD_FP_256_PACKED_DOUBLE     0x02

EVENT_ARITH                      0x14   PMC
UMASK_ARITH_FPU_DIV_ACTIVE       0x01
DEFAULT_OPTIONS_ARITH_NUM_DIV    EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_EDGE=1
UMASK_ARITH_NUM_DIV              0x01

EVENT_L2_RQSTS                         0x24   PMC
UMASK_L2_RQSTS_ALL_DEM_AND_DATA_RD_HIT 0x01
UMASK_L2_RQSTS_ALL_DEM_AND_DATA_RD     0x03
UMASK_L2_RQSTS_RFO_HITS                0x04
UMASK_L2_RQSTS_RFO_MISS                0x08
UMASK_L2_RQSTS_RFO_ANY                 0x0C
UMASK_L2_RQSTS_CODE_RD_HITS            0x10
UMASK_L2_RQSTS_CODE_RD_MISS            0x20
UMASK_L2_RQSTS_ALL_CODE_CODE_RD        0x30
UMASK_L2_RQSTS_PF_HIT                  0x40
UMASK_L2_RQSTS_PF_MISS                 0x80
UMASK_L2_RQSTS_ALL_PF                  0xC0
UMASK_L2_RQSTS_MISS                    0xAA

EVENT_L2_STORE_LOCK_RQSTS            0x27   PMC
UMASK_L2_STORE_LOCK_RQSTS_MISS       0x01
UMASK_L2_STORE_LOCK_RQSTS_HIT_M      0x08
UMASK_L2_STORE_LOCK_RQSTS_ALL        0x0F

EVENT_L1D_WB_RQST                  0x28   PMC
UMASK_L1D_WB_RQST_HIT_E            0x04
UMASK_L1D_WB_RQST_HIT_M            0x08
UMASK_L1D_WB_RQST_ALL              0x0F

EVENT_L3_LAT_CACHE               0x2E   PMC
UMASK_L3_LAT_CACHE_REFERENCE     0x4F
UMASK_L3_LAT_CACHE_MISS          0x41

EVENT_CPU_CLOCK_UNHALTED           0x3C   PMC
UMASK_CPU_CLOCK_UNHALTED_THREAD_P  0x00
UMASK_CPU_CLOCK_UNHALTED_REF_P     0x01
DEFAULT_OPTIONS_CPU_CLOCK_UNHALTED_TOTAL_CYCLES EVENT_OPTION_THRESHOLD=0x2,EVENT_OPTION_INVERT=0x1
UMASK_CPU_CLOCK_UNHALTED_TOTAL_CYCLES   0x00

EVENT_L1D_PEND_MISS              0x48   PMC1
UMASK_L1D_PEND_MISS_PENDING      0x01

EVENT_DTLB_STORE_MISSES                      0x49   PMC
UMASK_DTLB_STORE_MISSES_CAUSES_A_WALK        0x01
UMASK_DTLB_STORE_MISSES_WALK_COMPLETED       0x02
UMASK_DTLB_STORE_MISSES_WALK_DURATION        0x04
UMASK_DTLB_STORE_MISSES_STLB_HIT             0x10

EVENT_LOAD_HIT_PRE                     0x4C    PMC
UMASK_LOAD_HIT_PRE_SW_PF               0x01
UMASK_LOAD_HIT_PRE_HW_PF               0x02

EVENT_L1D                         0x51   PMC
UMASK_L1D_REPLACEMENT             0x01
UMASK_L1D_ALLOCATED_IN_M          0x02
UMASK_L1D_M_EVICT                 0x04
UMASK_L1D_ALL_M_REPLACEMENT       0x08

EVENT_MOVE_ELIMINATION                        0x58   PMC
UMASK_MOVE_ELIMINATION_INT_NOT_ELIMINATED     0x04
UMASK_MOVE_ELIMINATION_SIMD_NOT_ELIMINATED    0x08
UMASK_MOVE_ELIMINATION_INT_ELIMINATED         0x01
UMASK_MOVE_ELIMINATION_SIMD_ELIMINATED        0x02

EVENT_CPL_CYCLES               0x5C    PMC
UMASK_CPL_CYCLES_RING0         0x01
UMASK_CPL_CYCLES_RING123       0x02

EVENT_RS_EVENTS                 0x5E    PMC
UMASK_RS_EVENTS_EMPTY_CYCLES    0x01

EVENT_OFFCORE_REQUESTS_OUTSTANDING                  0x60   PMC
UMASK_OFFCORE_REQUESTS_OUTSTANDING_DEMAND_DATA_RD   0x01
UMASK_OFFCORE_REQUESTS_OUTSTANDING_DEMAND_CODE_RD   0x02
UMASK_OFFCORE_REQUESTS_OUTSTANDING_DEMAND_RFO       0x04
UMASK_OFFCORE_REQUESTS_OUTSTANDING_ALL_DATA_RD      0x08

EVENT_CACHE_LOCK_CYCLES                              0x63   PMC
UMASK_CACHE_LOCK_CYCLES_SPLIT_LOCK_UC_LOCK_DURATION  0x01
DEFAULT_OPTIONS_CACHE_LOCK_CYCLES_SPLIT_LOCK_UC_LOCK_COUNT EVENT_OPTION_EDGE=1
UMASK_CACHE_LOCK_CYCLES_SPLIT_LOCK_UC_LOCK_COUNT     0x01
UMASK_CACHE_LOCK_CYCLES_CACHE_LOCK_DURATION          0x02
DEFAULT_OPTIONS_CACHE_LOCK_CYCLES_CACHE_LOCK_COUNT EVENT_OPTION_EDGE=1
UMASK_CACHE_LOCK_CYCLES_CACHE_LOCK_COUNT             0x02

EVENT_IDQ                               0x79   PMC
UMASK_IDQ_EMPTY                         0x02
UMASK_IDQ_MITE_UOPS                     0x04
UMASK_IDQ_DSB_UOPS                      0x08
UMASK_IDQ_MS_DSB_UOPS                   0x10
UMASK_IDQ_MS_MITE_UOPS                  0x20
UMASK_IDQ_MS_UOPS                       0x30
UMASK_IDQ_DSB_ALL_UOPS                  0x18
UMASK_IDQ_MITE_ALL_UOPS                 0x24
UMASK_IDQ_ALL_UOPS                      0x3C
DEFAULT_OPTIONS_IDQ_MITE_CYCLES         EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MITE_CYCLES                   0x04
DEFAULT_OPTIONS_IDQ_MITE_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MITE_CYCLES_1_UOPS            0x04
DEFAULT_OPTIONS_IDQ_MITE_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_MITE_CYCLES_2_UOPS            0x04
DEFAULT_OPTIONS_IDQ_MITE_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_MITE_CYCLES_3_UOPS            0x04
DEFAULT_OPTIONS_IDQ_MITE_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_MITE_CYCLES_4_UOPS            0x04
DEFAULT_OPTIONS_IDQ_DSB_CYCLES          EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_DSB_CYCLES                    0x08
DEFAULT_OPTIONS_IDQ_DSB_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_DSB_CYCLES_1_UOPS             0x08
DEFAULT_OPTIONS_IDQ_DSB_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_DSB_CYCLES_2_UOPS             0x08
DEFAULT_OPTIONS_IDQ_DSB_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_DSB_CYCLES_3_UOPS             0x08
DEFAULT_OPTIONS_IDQ_DSB_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_DSB_CYCLES_4_UOPS             0x08
DEFAULT_OPTIONS_IDQ_MS_DSB_CYCLES       EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MS_DSB_CYCLES                 0x10
DEFAULT_OPTIONS_IDQ_MS_DSB_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MS_DSB_CYCLES_1_UOPS          0x10
DEFAULT_OPTIONS_IDQ_MS_DSB_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_MS_DSB_CYCLES_2_UOPS          0x10
DEFAULT_OPTIONS_IDQ_MS_DSB_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_MS_DSB_CYCLES_3_UOPS          0x10
DEFAULT_OPTIONS_IDQ_MS_DSB_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_MS_DSB_CYCLES_4_UOPS          0x10
DEFAULT_OPTIONS_IDQ_MS_DSB_OCCUR        EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_EDGE=1
UMASK_IDQ_MS_DSB_OCCUR                  0x10
DEFAULT_OPTIONS_IDQ_MS_MITE_CYCLES      EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MS_MITE_CYCLES                0x20
DEFAULT_OPTIONS_IDQ_MS_MITE_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MS_MITE_CYCLES_1_UOPS         0x20
DEFAULT_OPTIONS_IDQ_MS_MITE_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_MS_MITE_CYCLES_2_UOPS         0x20
DEFAULT_OPTIONS_IDQ_MS_MITE_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_MS_MITE_CYCLES_3_UOPS         0x20
DEFAULT_OPTIONS_IDQ_MS_MITE_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_MS_MITE_CYCLES_4_UOPS         0x20
DEFAULT_OPTIONS_IDQ_MS_CYCLES           EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MS_CYCLES                     0x30
DEFAULT_OPTIONS_IDQ_MS_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MS_CYCLES_1_UOPS              0x30
DEFAULT_OPTIONS_IDQ_MS_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_MS_CYCLES_2_UOPS              0x30
DEFAULT_OPTIONS_IDQ_MS_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_MS_CYCLES_3_UOPS              0x30
DEFAULT_OPTIONS_IDQ_MS_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_MS_CYCLES_4_UOPS              0x30
DEFAULT_OPTIONS_IDQ_MS_SWITCHES         EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_EDGE=1
UMASK_IDQ_MS_SWITCHES                   0x30
DEFAULT_OPTIONS_IDQ_ALL_DSB_CYCLES_ANY_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_ALL_DSB_CYCLES_ANY_UOPS       0x18
DEFAULT_OPTIONS_IDQ_ALL_DSB_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_ALL_DSB_CYCLES_1_UOPS         0x18
DEFAULT_OPTIONS_IDQ_ALL_DSB_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_ALL_DSB_CYCLES_2_UOPS         0x18
DEFAULT_OPTIONS_IDQ_ALL_DSB_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_ALL_DSB_CYCLES_3_UOPS         0x18
DEFAULT_OPTIONS_IDQ_ALL_DSB_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_ALL_DSB_CYCLES_4_UOPS         0x18
DEFAULT_OPTIONS_IDQ_ALL_MITE_CYCLES_ANY_UOPS  EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_ALL_MITE_CYCLES_ANY_UOPS      0x24
DEFAULT_OPTIONS_IDQ_ALL_MITE_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_ALL_MITE_CYCLES_1_UOPS        0x24
DEFAULT_OPTIONS_IDQ_ALL_MITE_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_ALL_MITE_CYCLES_2_UOPS        0x24
DEFAULT_OPTIONS_IDQ_ALL_MITE_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_ALL_MITE_CYCLES_3_UOPS        0x24
DEFAULT_OPTIONS_IDQ_ALL_MITE_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_ALL_MITE_CYCLES_4_UOPS        0x24
DEFAULT_OPTIONS_IDQ_ALL_CYCLES_ANY_UOPS  EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_ALL_CYCLES_ANY_UOPS      0x3C
DEFAULT_OPTIONS_IDQ_ALL_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_ALL_CYCLES_1_UOPS        0x3C
DEFAULT_OPTIONS_IDQ_ALL_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_ALL_CYCLES_2_UOPS        0x3C
DEFAULT_OPTIONS_IDQ_ALL_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_ALL_CYCLES_3_UOPS        0x3C
DEFAULT_OPTIONS_IDQ_ALL_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_ALL_CYCLES_4_UOPS        0x3C

EVENT_ICACHE                    0x80   PMC
UMASK_ICACHE_HITS               0x01
UMASK_ICACHE_MISSES             0x02
UMASK_ICACHE_ACCESSES           0x03
UMASK_ICACHE_IFETCH_STALL       0x04

EVENT_ITLB_MISSES                 0x85      PMC
UMASK_ITLB_MISSES_CAUSES_A_WALK   0x01
UMASK_ITLB_MISSES_WALK_COMPLETED  0x02
UMASK_ITLB_MISSES_WALK_DURATION   0x04
UMASK_ITLB_MISSES_STLB_HIT        0x10

EVENT_ILD_STALL                 0x87      PMC
UMASK_ILD_STALL_LCP             0x01
UMASK_ILD_STALL_IQ_FULL         0x04

EVENT_BR_INST_EXEC                                      0x88   PMC
UMASK_BR_INST_EXEC_COND_TAKEN                           0x81
UMASK_BR_INST_EXEC_COND_NON_TAKEN                       0x41
UMASK_BR_INST_EXEC_DIRECT_JMP_TAKEN                     0x82
UMASK_BR_INST_EXEC_DIRECT_JMP_NON_TAKEN                 0x42
UMASK_BR_INST_EXEC_INDIRECT_JMP_NON_CALL_RET_TAKEN      0x84
UMASK_BR_INST_EXEC_INDIRECT_JMP_NON_CALL_RET_NON_TAKEN  0x44
UMASK_BR_INST_EXEC_RETURN_NEAR_TAKEN                    0x88
UMASK_BR_INST_EXEC_RETURN_NEAR_NON_TAKEN                0x48
UMASK_BR_INST_EXEC_DIRECT_NEAR_CALL_TAKEN               0x90
UMASK_BR_INST_EXEC_DIRECT_NEAR_CALL_NON_TAKEN           0x50
UMASK_BR_INST_EXEC_INDIRECT_NEAR_CALL_TAKEN             0xA0
UMASK_BR_INST_EXEC_INDIRECT_NEAR_CALL_NON_TAKEN         0x60
UMASK_BR_INST_EXEC_ALL_BRANCHES                         0xFF

EVENT_BR_MISP_EXEC                                      0x89   PMC
UMASK_BR_MISP_EXEC_COND_TAKEN                           0x81
UMASK_BR_MISP_EXEC_COND_NON_TAKEN                       0x41
UMASK_BR_MISP_EXEC_INDIRECT_JMP_NON_CALL_RET_TAKEN      0x84
UMASK_BR_MISP_EXEC_INDIRECT_JMP_NON_CALL_RET_NON_TAKEN  0x44
UMASK_BR_MISP_EXEC_RETURN_NEAR_TAKEN                    0x88
UMASK_BR_MISP_EXEC_RETURN_NEAR_NON_TAKEN                0x48
UMASK_BR_MISP_EXEC_DIRECT_NEAR_CALL_TAKEN               0x90
UMASK_BR_MISP_EXEC_DIRECT_NEAR_CALL_NON_TAKEN           0x50
UMASK_BR_MISP_EXEC_INDIRECT_NEAR_CALL_TAKEN             0xA0
UMASK_BR_MISP_EXEC_INDIRECT_NEAR_CALL_NON_TAKEN         0x60
UMASK_BR_MISP_EXEC_ALL_BRANCHES                         0xFF

EVENT_IDQ_UOPS_NOT_DELIVERED                            0x9C   PMC
UMASK_IDQ_UOPS_NOT_DELIVERED_CORE                       0x01
DEFAULT_OPTIONS_IDQ_UOPS_NOT_DELIVERED_CYCLES_0_UOPS_DELIV_CORE EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_UOPS_NOT_DELIVERED_CYCLES_0_UOPS_DELIV_CORE   0x01
DEFAULT_OPTIONS_IDQ_UOPS_NOT_DELIVERED_CYCLES_LE_1_UOP_DELIV_CORE EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_UOPS_NOT_DELIVERED_CYCLES_LE_1_UOP_DELIV_CORE 0x01
DEFAULT_OPTIONS_IDQ_UOPS_NOT_DELIVERED_CYCLES_LE_2_UOP_DELIV_CORE EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_UOPS_NOT_DELIVERED_CYCLES_LE_2_UOP_DELIV_CORE 0x01
DEFAULT_OPTIONS_IDQ_UOPS_NOT_DELIVERED_CYCLES_LE_3_UOP_DELIV_CORE EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_UOPS_NOT_DELIVERED_CYCLES_LE_3_UOP_DELIV_CORE 0x01
DEFAULT_OPTIONS_IDQ_UOPS_NOT_DELIVERED_CYCLES_FE_WAS_OK EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1
UMASK_IDQ_UOPS_NOT_DELIVERED_CYCLES_FE_WAS_OK           0x01

EVENT_UOPS_DISPATCHED_PORT                  0xA1   PMC
UMASK_UOPS_DISPATCHED_PORT_PORT_0           0x01
UMASK_UOPS_DISPATCHED_PORT_PORT_1           0x02
UMASK_UOPS_DISPATCHED_PORT_PORT_2_LD        0x04
UMASK_UOPS_DISPATCHED_PORT_PORT_2_STA       0x08
UMASK_UOPS_DISPATCHED_PORT_PORT_2           0x0C
UMASK_UOPS_DISPATCHED_PORT_PORT_3_LD        0x10
UMASK_UOPS_DISPATCHED_PORT_PORT_3_STA       0x20
UMASK_UOPS_DISPATCHED_PORT_PORT_3           0x30
UMASK_UOPS_DISPATCHED_PORT_PORT_4           0x40
UMASK_UOPS_DISPATCHED_PORT_PORT_5           0x80
DEFAULT_OPTIONS_UOPS_DISPATCHED_PORT_ARITH_PORTS_CORE EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_DISPATCHED_PORT_ARITH_PORTS_CORE 0x83
UMASK_UOPS_DISPATCHED_PORT_DATA_PORTS       0x7C
UMASK_UOPS_DISPATCHED_PORT_ALL_PORTS        0xFF

EVENT_RESOURCE_STALLS                 0xA2   PMC
UMASK_RESOURCE_STALLS_ANY             0x01
UMASK_RESOURCE_STALLS_RS              0x04
UMASK_RESOURCE_STALLS_SB              0x08
UMASK_RESOURCE_STALLS_ROB             0x10

EVENT_CYCLE_ACTIVITY                               0xA3   PMC
DEFAULT_OPTIONS_CYCLE_ACTIVITY_CYCLES_L2_PENDING   EVENT_OPTION_THRESHOLD=0x01
UMASK_CYCLE_ACTIVITY_CYCLES_L2_PENDING             0x01
DEFAULT_OPTIONS_CYCLE_ACTIVITY_CYCLES_LDM_PENDING  EVENT_OPTION_THRESHOLD=0x02
UMASK_CYCLE_ACTIVITY_CYCLES_LDM_PENDING            0x02
DEFAULT_OPTIONS_CYCLE_ACTIVITY_CYCLES_NO_EXECUTE   EVENT_OPTION_THRESHOLD=0x04
UMASK_CYCLE_ACTIVITY_CYCLES_NO_EXECUTE             0x04
DEFAULT_OPTIONS_CYCLE_ACTIVITY_STALLS_TOTAL        EVENT_OPTION_THRESHOLD=0x4
UMASK_CYCLE_ACTIVITY_STALLS_TOTAL                  0x04
DEFAULT_OPTIONS_CYCLE_ACTIVITY_STALLS_L2_PENDING   EVENT_OPTION_THRESHOLD=0x05
UMASK_CYCLE_ACTIVITY_STALLS_L2_PENDING             0x05
DEFAULT_OPTIONS_CYCLE_ACTIVITY_STALLS_LDM_PENDING  EVENT_OPTION_THRESHOLD=0x06
UMASK_CYCLE_ACTIVITY_STALLS_LDM_PENDING            0x06

EVENT_CYCLE_ACTIVITY_CYCLES_L1D_PENDING                  0xA3   PMC2
DEFAULT_OPTIONS_CYCLE_ACTIVITY_CYCLES_L1D_PENDING        EVENT_OPTION_THRESHOLD=0x08
UMASK_CYCLE_ACTIVITY_CYCLES_L1D_PENDING                  0x08

EVENT_CYCLE_ACTIVITY_STALLS_L1D_PENDING                  0xA3   PMC2
DEFAULT_OPTIONS_CYCLE_ACTIVITY_STALLS_L1D_PENDING        EVENT_OPTION_THRESHOLD=0x0C
UMASK_CYCLE_ACTIVITY_STALLS_L1D_PENDING                  0x0C

EVENT_DSB2MITE_SWITCHES                 0xAB   PMC
UMASK_DSB2MITE_SWITCHES_COUNT           0x01
UMASK_DSB2MITE_SWITCHES_PENALTY_CYCLES  0x02

EVENT_DSB_FILL                          0xAC   PMC
UMASK_DSB_FILL_EXCEED_DSB_LINES         0x08

EVENT_ITLB                              0xAE   PMC
UMASK_ITLB_ITLB_FLUSH                   0x01

EVENT_OFFCORE_REQUESTS                  0xB0   PMC
UMASK_OFFCORE_REQUESTS_DEMAND_DATA_RD   0x01
UMASK_OFFCORE_REQUESTS_DEMAND_CODE_RD   0x02
UMASK_OFFCORE_REQUESTS_DEMAND_RFO       0x04
UMASK_OFFCORE_REQUESTS_ALL_DATA_RD      0x08

EVENT_UOPS_EXECUTED                       0xB1   PMC
UMASK_UOPS_EXECUTED_THREAD                0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_USED_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_EXECUTED_USED_CYCLES           0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_STALL_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1
UMASK_UOPS_EXECUTED_STALL_CYCLES          0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_TOTAL_CYCLES EVENT_OPTION_THRESHOLD=0xA,EVENT_OPTION_INVERT=1
UMASK_UOPS_EXECUTED_TOTAL_CYCLES          0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_1_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_EXECUTED_CYCLES_GE_1_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_2_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x2
UMASK_UOPS_EXECUTED_CYCLES_GE_2_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_3_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x3
UMASK_UOPS_EXECUTED_CYCLES_GE_3_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_4_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x4
UMASK_UOPS_EXECUTED_CYCLES_GE_4_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_5_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x5
UMASK_UOPS_EXECUTED_CYCLES_GE_5_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_6_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x6
UMASK_UOPS_EXECUTED_CYCLES_GE_6_UOPS_EXEC 0x01
UMASK_UOPS_EXECUTED_CORE                       0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_USED_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_EXECUTED_CORE_USED_CYCLES           0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_STALL_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1
UMASK_UOPS_EXECUTED_CORE_STALL_CYCLES          0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_TOTAL_CYCLES EVENT_OPTION_THRESHOLD=0xA,EVENT_OPTION_INVERT=1
UMASK_UOPS_EXECUTED_CORE_TOTAL_CYCLES          0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_1_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_1_UOPS_EXEC 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_2_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x2
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_2_UOPS_EXEC 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_3_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x3
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_3_UOPS_EXEC 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_4_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x4
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_4_UOPS_EXEC 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_5_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x5
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_5_UOPS_EXEC 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_6_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x6
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_6_UOPS_EXEC 0x02

EVENT_OFFCORE_REQUESTS_BUFFER         0xB2 PMC
UMASK_OFFCORE_REQUESTS_BUFFER_SQ_FULL 0x01

EVENT_TLB_FLUSH                 0xBD  PMC
UMASK_TLB_FLUSH_DTLB_THREAD     0x01
UMASK_TLB_FLUSH_STLB_ANY        0x20

EVENT_INST_RETIRED                  0xC0  PMC1
UMASK_INST_RETIRED_ANY_P            0x00
UMASK_INST_RETIRED_ALL              0x01

EVENT_OTHER_ASSISTS                  0xC1  PMC
UMASK_OTHER_ASSISTS_AVX_STORE        0x08
UMASK_OTHER_ASSISTS_AVX_TO_SSE       0x10
UMASK_OTHER_ASSISTS_SSE_TO_AVX       0x20

EVENT_UOPS_RETIRED                       0xC2  PMC
UMASK_UOPS_RETIRED_ALL                   0x01
UMASK_UOPS_RETIRED_RETIRE_SLOTS          0x02
DEFAULT_OPTIONS_UOPS_RETIRED_USED_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_RETIRED_USED_CYCLES           0x01
DEFAULT_OPTIONS_UOPS_RETIRED_STALL_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1
UMASK_UOPS_RETIRED_STALL_CYCLES          0x01
DEFAULT_OPTIONS_UOPS_RETIRED_TOTAL_CYCLES EVENT_OPTION_THRESHOLD=0xA,EVENT_OPTION_INVERT=1
UMASK_UOPS_RETIRED_TOTAL_CYCLES          0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CORE_ALL EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_RETIRED_CORE_ALL              0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CORE_RETIRE_SLOTS EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_RETIRED_CORE_RETIRE_SLOTS     0x02
DEFAULT_OPTIONS_UOPS_RETIRED_CORE_USED_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_RETIRED_CORE_USED_CYCLES      0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CORE_STALL_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1,EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_RETIRED_CORE_STALL_CYCLES     0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CORE_TOTAL_CYCLES EVENT_OPTION_THRESHOLD=0xA,EVENT_OPTION_INVERT=1,EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_RETIRED_CORE_TOTAL_CYCLES     0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_1_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_RETIRED_CYCLES_GE_1_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_2_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x2
UMASK_UOPS_RETIRED_CYCLES_GE_2_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_3_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x3
UMASK_UOPS_RETIRED_CYCLES_GE_3_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_4_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x4
UMASK_UOPS_RETIRED_CYCLES_GE_4_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_5_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x5
UMASK_UOPS_RETIRED_CYCLES_GE_5_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_6_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x6
UMASK_UOPS_RETIRED_CYCLES_GE_6_UOPS_EXEC 0x01

EVENT_MACHINE_CLEARS                    0xC3  PMC
UMASK_MACHINE_CLEARS_CYCLES             0x01
DEFAULT_OPTIONS_MACHINE_CLEARS_COUNT    EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_EDGE=1
UMASK_MACHINE_CLEARS_COUNT              0x01
UMASK_MACHINE_CLEARS_MEMORY_ORDERING    0x02
UMASK_MACHINE_CLEARS_SMC                0x04
UMASK_MACHINE_CLEARS_MASKMOV            0x20

EVENT_BR_INST_RETIRED               0xC4  PMC
UMASK_BR_INST_RETIRED_ALL_BRANCHES  0x00
UMASK_BR_INST_RETIRED_CONDITIONAL   0x01
UMASK_BR_INST_RETIRED_NEAR_CALL     0x02
UMASK_BR_INST_RETIRED_NEAR_RETURN   0x08
UMASK_BR_INST_RETIRED_NOT_TAKEN     0x10
UMASK_BR_INST_RETIRED_NEAR_TAKEN    0x20
UMASK_BR_INST_RETIRED_FAR_BRANCH    0x40

EVENT_BR_MISP_RETIRED               0xC5  PMC
UMASK_BR_MISP_RETIRED_ALL_BRANCHES  0x00
UMASK_BR_MISP_RETIRED_CONDITIONAL   0x01
UMASK_BR_MISP_RETIRED_NEAR_CALL     0x02
UMASK_BR_MISP_RETIRED_NOT_TAKEN     0x10
UMASK_BR_MISP_RETIRED_TAKEN         0x20

EVENT_FP_ASSIST                     0xCA  PMC
UMASK_FP_ASSIST_X87_OUTPUT          0x02
UMASK_FP_ASSIST_X87_INPUT           0x04
UMASK_FP_ASSIST_SIMD_OUTPUT         0x08
UMASK_FP_ASSIST_SIMD_INPUT          0x10
UMASK_FP_ASSIST_ANY                 0x1E

EVENT_ROB_MISC_EVENT_LBR_INSERTS               0xCC  PMC
UMASK_ROB_MISC_EVENT_LBR_INSERTS               0x20

EVENT_MEM_UOPS_RETIRED                  0xD0    PMC
UMASK_MEM_UOPS_RETIRED_LOADS            0x81
UMASK_MEM_UOPS_RETIRED_STORES           0x82
UMASK_MEM_UOPS_RETIRED_LOADS_STLB_MISS  0x11
UMASK_MEM_UOPS_RETIRED_STORES_STLB_MISS 0x12
UMASK_MEM_UOPS_RETIRED_LOADS_LOCK       0x21
UMASK_MEM_UOPS_RETIRED_STORES_LOCK      0x22
UMASK_MEM_UOPS_RETIRED_LOADS_SPLIT      0x41
UMASK_MEM_UOPS_RETIRED_STORES_SPLIT     0x42

EVENT_MEM_LOAD_UOPS_RETIRED               0xD1   PMC
UMASK_MEM_LOAD_UOPS_RETIRED_L1_HIT       0x01
UMASK_MEM_LOAD_UOPS_RETIRED_L1_MISS      0x08
UMASK_MEM_LOAD_UOPS_RETIRED_L1_ALL       0x09
UMASK_MEM_LOAD_UOPS_RETIRED_L2_HIT       0x02
UMASK_MEM_LOAD_UOPS_RETIRED_L2_MISS      0x10
UMASK_MEM_LOAD_UOPS_RETIRED_L2_ALL       0x12
UMASK_MEM_LOAD_UOPS_RETIRED_L3_HIT       0x04
UMASK_MEM_LOAD_UOPS_RETIRED_L3_MISS      0x20
UMASK_MEM_LOAD_UOPS_RETIRED_L3_ALL       0x24
UMASK_MEM_LOAD_UOPS_RETIRED_HIT_LFB      0x40
UMASK_MEM_LOAD_UOPS_RETIRED_ALL          0x7F

EVENT_MEM_LOAD_UOPS_LLC_HIT_RETIRED                   0xD2   PMC
UMASK_MEM_LOAD_UOPS_LLC_HIT_RETIRED_XSNP_MISS         0x01
UMASK_MEM_LOAD_UOPS_LLC_HIT_RETIRED_XSNP_HIT          0x02
UMASK_MEM_LOAD_UOPS_LLC_HIT_RETIRED_XSNP_HITM         0x04
UMASK_MEM_LOAD_UOPS_LLC_HIT_RETIRED_XSNP_NONE         0x08

EVENT_MEM_LOAD_UOPS_MISC_RETIRED               0xD4   PMC
UMASK_MEM_LOAD_UOPS_MISC_RETIRED_LLC_MISS      0x02

EVENT_BACLEARS               0xE6   PMC
UMASK_BACLEARS_ANY           0x1F

EVENT_L2_TRANS                0xF0  PMC
UMASK_L2_TRANS_DEMAND_DATA_RD 0x01
UMASK_L2_TRANS_RFO            0x02
UMASK_L2_TRANS_CODE_RD        0x04
UMASK_L2_TRANS_ALL_PREF       0x08
UMASK_L2_TRANS_L1D_WB         0x10
UMASK_L2_TRANS_L2_FILL        0x20
UMASK_L2_TRANS_L2_WB          0x40
UMASK_L2_TRANS_ALL_REQUESTS   0x80

EVENT_L2_LINES_IN             0xF1   PMC
UMASK_L2_LINES_IN_I           0x01
UMASK_L2_LINES_IN_S           0x02
UMASK_L2_LINES_IN_E           0x04
UMASK_L2_LINES_IN_ALL         0x07

EVENT_L2_LINES_OUT                  0xF2   PMC
UMASK_L2_LINES_OUT_DEMAND_CLEAN     0x01
UMASK_L2_LINES_OUT_DEMAND_DIRTY     0x02
UMASK_L2_LINES_OUT_PF_CLEAN         0x04
UMASK_L2_LINES_OUT_PF_DIRTY         0x08
UMASK_L2_LINES_OUT_DIRTY_ALL        0x0A
UMASK_L2_LINES_OUT_CLEAN_ALL        0x05
UMASK_L2_LINES_OUT_ALL              0x0F

EVENT_MEM_LOAD_UOPS_LLC_MISS_RETIRED                 0xD3   PMC
UMASK_MEM_LOAD_UOPS_LLC_MISS_RETIRED_LOCAL_DRAM      0x01

EVENT_OFFCORE_RESPONSE_0                            0xB7 PMC
OPTIONS_OFFCORE_RESPONSE_0_OPTIONS                  EVENT_OPTION_MATCH0_MASK|EVENT_OPTION_MATCH1_MASK
UMASK_OFFCORE_RESPONSE_0_OPTIONS                    0x01 0xFF 0xFF
UMASK_OFFCORE_RESPONSE_0_DMND_DATA_RD_ANY           0x01 0x00 0x10
UMASK_OFFCORE_RESPONSE_0_DMND_RFO_ANY               0x01 0x01 0x10
UMASK_OFFCORE_RESPONSE_0_DMND_CODE_RD_ANY           0x01 0x02 0x10
UMASK_OFFCORE_RESPONSE_0_WB_ANY                     0x01 0x03 0x10
UMASK_OFFCORE_RESPONSE_0_PF_L2_DATA_RD_ANY          0x01 0x04 0x10
UMASK_OFFCORE_RESPONSE_0_PF_L2_RFO_ANY              0x01 0x05 0x10
UMASK_OFFCORE_RESPONSE_0_PF_L2_CODE_RD_ANY          0x01 0x06 0x10
UMASK_OFFCORE_RESPONSE_0_PF_L3_DATA_RD_ANY          0x01 0x07 0x10
UMASK_OFFCORE_RESPONSE_0_PF_L3_RFO_ANY              0x01 0x08 0x10
UMASK_OFFCORE_RESPONSE_0_PF_L3_CODE_RD_ANY          0x01 0x09 0x10
UMASK_OFFCORE_RESPONSE_0_SPLIT_LOCK_UC_LOCK_ANY     0x01 0x0A 0x10
UMASK_OFFCORE_RESPONSE_0_STREAMING_STORES_ANY       0x01 0x0B 0x10
UMASK_OFFCORE_RESPONSE_0_OTHER_ANY                  0x01 0x0F 0x10

EVENT_OFFCORE_RESPONSE_1                            0xBB PMC
OPTIONS_OFFCORE_RESPONSE_1_OPTIONS                  EVENT_OPTION_MATCH0_MASK|EVENT_OPTION_MATCH1_MASK
UMASK_OFFCORE_RESPONSE_1_OPTIONS                    0x01 0xFF 0xFF
UMASK_OFFCORE_RESPONSE_1_DMND_DATA_RD_ANY           0x01 0x00 0x10
UMASK_OFFCORE_RESPONSE_1_DMND_RFO_ANY               0x01 0x01 0x10
UMASK_OFFCORE_RESPONSE_1_DMND_CODE_RD_ANY           0x01 0x02 0x10
UMASK_OFFCORE_RESPONSE_1_WB_ANY                     0x01 0x03 0x10
UMASK_OFFCORE_RESPONSE_1_PF_L2_DATA_RD_ANY          0x01 0x04 0x10
UMASK_OFFCORE_RESPONSE_1_PF_L2_RFO_ANY              0x01 0x05 0x10
UMASK_OFFCORE_RESPONSE_1_PF_L2_CODE_RD_ANY          0x01 0x06 0x10
UMASK_OFFCORE_RESPONSE_1_PF_L3_DATA_RD_ANY          0x01 0x07 0x10
UMASK_OFFCORE_RESPONSE_1_PF_L3_RFO_ANY              0x01 0x08 0x10
UMASK_OFFCORE_RESPONSE_1_PF_L3_CODE_RD_ANY          0x01 0x09 0x10
UMASK_OFFCORE_RESPONSE_1_SPLIT_LOCK_UC_LOCK_ANY     0x01 0x0A 0x10
UMASK_OFFCORE_RESPONSE_1_STREAMING_STORES_ANY       0x01 0x0B 0x10
UMASK_OFFCORE_RESPONSE_1_OTHER_ANY                  0x01 0x0F 0x10


EVENT_CACHE_LOOKUP                          0x34 CBOX
UMASK_CACHE_LOOKUP_M                        0x01
UMASK_CACHE_LOOKUP_E                        0x02
UMASK_CACHE_LOOKUP_S                        0x04
UMASK_CACHE_LOOKUP_I                        0x08
UMASK_CACHE_LOOKUP_READ_FILTER              0x10
UMASK_CACHE_LOOKUP_WRITE_FILTER             0x20
UMASK_CACHE_LOOKUP_EXTSNP_FILTER            0x40
UMASK_CACHE_LOOKUP_ANY_REQUEST_FILTER       0x80
UMASK_CACHE_LOOKUP_READ_M                   0x11
UMASK_CACHE_LOOKUP_WRITE_M                  0x21
UMASK_CACHE_LOOKUP_EXTSNP_M                 0x41
UMASK_CACHE_LOOKUP_ANY_M                    0x81
UMASK_CACHE_LOOKUP_READ_E                   0x12
UMASK_CACHE_LOOKUP_WRITE_E                  0x22
UMASK_CACHE_LOOKUP_EXTSNP_E                 0x42
UMASK_CACHE_LOOKUP_ANY_E                    0x82
UMASK_CACHE_LOOKUP_READ_S                   0x14
UMASK_CACHE_LOOKUP_WRITE_S                  0x24
UMASK_CACHE_LOOKUP_EXTSNP_S                 0x44
UMASK_CACHE_LOOKUP_ANY_S                    0x84
UMASK_CACHE_LOOKUP_READ_ES                  0x16
UMASK_CACHE_LOOKUP_WRITE_ES                 0x26
UMASK_CACHE_LOOKUP_EXTSNP_ES                0x46
UMASK_CACHE_LOOKUP_ANY_ES                   0x86
UMASK_CACHE_LOOKUP_READ_I                   0x18
UMASK_CACHE_LOOKUP_WRITE_I                  0x28
UMASK_CACHE_LOOKUP_EXTSNP_I                 0x48
UMASK_CACHE_LOOKUP_ANY_I                    0x88
UMASK_CACHE_LOOKUP_READ_MESI                0x1F
UMASK_CACHE_LOOKUP_WRITE_MESI               0x2F
UMASK_CACHE_LOOKUP_EXTSNP_MESI              0x4F
UMASK_CACHE_LOOKUP_ANY_MESI                 0x8F

EVENT_XSNP_RESPONSE                         0x22 CBOX
UMASK_XSNP_RESPONSE_MISS                    0x01
UMASK_XSNP_RESPONSE_INVAL                   0x02
UMASK_XSNP_RESPONSE_HIT                     0x04
UMASK_XSNP_RESPONSE_HITM                    0x08
UMASK_XSNP_RESPONSE_INVAL_M                 0x10
UMASK_XSNP_RESPONSE_EXTERNAL_FILTER         0x20
UMASK_XSNP_RESPONSE_XCORE_FILTER            0x40
UMASK_XSNP_RESPONSE_EVICTION_FILTER         0x80
UMASK_XSNP_RESPONSE_MISS_EXTERNAL           0x21
UMASK_XSNP_RESPONSE_MISS_XCORE              0x41
UMASK_XSNP_RESPONSE_MISS_EVICTION           0x81
UMASK_XSNP_RESPONSE_INVAL_EXTERNAL          0x22
UMASK_XSNP_RESPONSE_INVAL_XCORE             0x42
UMASK_XSNP_RESPONSE_INVAL_EVICTION          0x82
UMASK_XSNP_RESPONSE_HIT_EXTERNAL            0x24
UMASK_XSNP_RESPONSE_HIT_XCORE               0x44
UMASK_XSNP_RESPONSE_HIT_EVICTION            0x84
UMASK_XSNP_RESPONSE_HITM_EXTERNAL           0x28
UMASK_XSNP_RESPONSE_HITM_XCORE              0x48
UMASK_XSNP_RESPONSE_HITM_EVICTION           0x88

EVENT_TRK_OCCUPANCY                         0x80 UBOX0
UMASK_TRK_OCCUPANCY_ALL                     0x01
DEFAULT_OPTIONS_TRK_OCCUPANCY_CYCLES_WITH_ANY_REQUEST EVENT_OPTION_THRESHOLD=0x1
UMASK_TRK_OCCUPANCY_CYCLES_WITH_ANY_REQUEST 0x01
DEFAULT_OPTIONS_TRK_OCCUPANCY_CYCLES_OVER_HALF_FULL EVENT_OPTION_THRESHOLD=0xA
UMASK_TRK_OCCUPANCY_CYCLES_OVER_HALF_FULL   0x01

EVENT_TRK_REQUESTS                          0x81 UBOX
UMASK_TRK_REQUESTS_ALL                      0x01
UMASK_TRK_REQUESTS_WRITES                   0x20
UMASK_TRK_REQUESTS_EVICTIONS                0x80

EVENT_COH_TRK_OCCUPANCY                     0x83 UBOX0
UMASK_COH_TRK_OCCUPANCY                     0x01

EVENT_COH_TRK_REQUESTS                      0x84 UBOX
UMASK_COH_TRK_REQUESTS_ALL                  0x01

EVENT_UNCORE_CLOCK                          0x00 UBOXFIX
UMASK_UNCORE_CLOCK                          0x01

EVENT_IO_REQUESTS                          0x00 MBOX0C0
UMASK_IO_REQUESTS                          0x00

EVENT_DRAM_READS                         0x01 MBOX0C1
UMASK_DRAM_READS                         0x01

EVENT_DRAM_WRITES                        0x02 MBOX0C2
UMASK_DRAM_WRITES                        0x02
